Body-Coupled Power Transceiver with Node-Specific Body-Area Powering

Dong, Youming; Li, Jiamin; Lin, Longyang; Tang, Tao; Park, Jeong Hoan; Ng, Kian Ann; Zhang, Miaolin; Tan, Joanne Si Ying; Yoo, Jerald

doi:10.1109/esscirc53450.2021.9567745

Cited by 10 publications

(3 citation statements)

References 15 publications

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“…For higher power delivery over the optimal BCP frequency span (up to 80 MHz [7]), an HV driving stage is designed at the BS TX. Compared with the implementations in the HV or SOI process [28], standard CMOS-compliant designs use the stacked MOS configurations with corresponding biasing techniques to tackle the overstress and gate-oxide reliability issue [22], [29], [30]. Serneels et al [29] and Luo and Ker [30] introduced the self-generated and adaptive gate biasing techniques, respectively.…”

Section: Charge-replenishing High-voltage Drivermentioning

confidence: 99%

“…However, both biasing techniques consume high static current which increases with the switching speed. Dong et al [22] introduced a four-stage charge-pump-based gate biasing technique, which removes the need for additional biasing circuits, level shifters, and tapered buffers, reducing the power consumption. However, the limited transition speed in [22] not only limits the driver switching frequency but also leads to increased power loss due to the crowbar current at a higher switching frequency.…”

Section: Charge-replenishing High-voltage Drivermentioning

confidence: 99%

“…Switches dedicated to the path selection are required, where the synchronization and switch control remain a challenge. In [22], TDM-based power downlink and data uplink are implemented, where path selection switches are avoided by introducing an electrode at the body interface of each path. To alleviate the need for synchronization between paths, the asynchronous data feedback mechanism that relies on the repetitive transmission of a data packet is proposed, causing redundancy and low data rate.…”

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confidence: 99%

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Concurrent Body-Coupled Powering and Communication ICs With a Single Electrode

Li,

Dong,

Lin

et al. 2024

IEEE J. Solid-State Circuits

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Body-coupled powering (BCP) and body-coupled communication (BCC) utilize the human body channel as the wireless transmission medium, which shows less path loss around the body area. However, integrating both BCP and BCC requires multiple electrodes or alternating the uplink and downlink in the time domain, due to signal interferences and backflow between different paths. To address this issue, we propose a base station (BS) IC and a sensor node (SN) IC with BCP and BCC concurrency. At the BS, the adaptive self-interference cancellation (SI-C) structure suppresses the output signals that are coupled at the data receiver, enabling the concurrent uplink data recovery and downlink power delivery. At the SN, the ground domain of the uplink data path is separated from that of the downlink power/data path to suppress leakage between the paths. For regulated power supply in different ground domains, the cross-ground-domain power converter is designed with 89.1% efficiency. The ICs are implemented in a 40-nm 1P8M standard CMOS process, and BCC + BCP concurrent operations are successfully validated.Index Terms-Body-coupled communication (BCC), bodycoupled powering (BCP), power-data co-transfer, power-data concurrency, wireless body-area network (BAN). I. INTRODUCTIONB ODY-AREA network (BAN) empowers the cooperated sensing, recognition, and stimulation of bio-signals distributed around the body area [1]. However, on the one hand, the increasing need for downlink (e.g., for remote control and coordination) and uplink communication (e.g., for multisite sensing) incurs additional power overhead. On the other hand, the need for miniaturized form factor (e.g., for user comfort) further limits the on-chip energy, demanding wireless Manuscript

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