Bottom-Up Copper Filling of Millimeter Size Through Silicon Vias

Josell, Daniel; Menk, Lyle Alexander; Hollowell, Andrew E; Blain, Matthew G.; Moffat, Thomas P.

doi:10.1149/2.0321901jes

Cited by 21 publications

(43 citation statements)

References 31 publications

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“…Experimental deposition of Cu in substantially larger (125 μm diameter and 625 μm deep) through-silicon vias has established that convective transport can greatly impact feature filling, affecting not only the dynamics of the superconformal filling process but even the symmetry of the growth surface. 45 , 70 Full computational fluid dynamic calculations must be added to electrodeposition models in order to quantitatively capture how convective transport impacts deposition in larger features. Nevertheless, simulations using a fixed boundary layer provide a foundation for modelling filling in S-NDR based systems, with coupled fluid dynamics to be explored in the future.…”

Section: Resultsmentioning

confidence: 99%

Editors' Choice—Simulation of Copper Electrodeposition in Through-Hole Vias

Braun

Josell

John

et al. 2019

J. Electrochem. Soc.

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Copper electrodeposition processes for filling metallized through-hole (TH) and through-silicon vias (TSV) depend on spatially selective breakdown of a co-adsorbed polyether-chloride adlayer within the recessed surface features. In this work, a co-adsorption-dependent suppression model that has previously captured experimental observations of localized Cu deposition in TSV is used to explore filling of TH features. Simulations of potentiodynamic and galvanostatic TH filling are presented. An appropriate applied potential or current localizes deposition to the middle of the TH. Subsequent deposition proceeds most rapidly in the radial direction leading to sidewall impingement at the via center creating two blind vias. The growth front then evolves primarily toward the two via openings to completely fill the TH in a manner analogous to TSV filling. Applied potentials, or currents, that are overly reducing result in metal ion depletion within the via and void formation. Simulations in larger TH features (i.e., diameter = 85 μm instead of 10 μm) indicate that lateral diffusional gradients within the via can lead to fluctuations between active and passive deposition along the metal/electrolyte interface.

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Section: Resultsmentioning

confidence: 99%

Editors' Choice—Simulation of Copper Electrodeposition in Through-Hole Vias

Braun

Josell

John

et al. 2019

J. Electrochem. Soc.

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“…2,8,9,75 For larger TSVs, 125 μm in diameter and 625 μm deep, the convex shape is even more pronounced. 77 A trend toward ⟨110⟩ texture develops normal to the active growth front, reflecting the influence of Cl − on the polymer-disrupted and/or -denuded growth surface. 76 Models based on transport-constrained suppressor motion and consumption, Figure 9, can capture the general bottom-up filling behavior based on additive consumption.…”

Section: Leveler−accelerator Interactionsmentioning

confidence: 99%

“…The same dynamics apply to larger 125-μm-diameter and 625-μmdeep vias, with Cl − consumption and depletion determining the location and shape of the passive−active sidewall transition. 77 Importantly, given the passive−active transition, filling of the vias requires decreasing the applied potential to more negative values to move the transition and associated active deposition upward but is slow enough that Cu 2+ depletion does not result in void formation. Simulations, including forced hydrodynamics in the 625-μm-deep vias, capture the observed evolution of the growth front geometry and filling trends, although a more detailed comparison of filling in these largest vias awaits experiments with well-defined hydrodynamics.…”

Section: Leveler−accelerator Interactionsmentioning

confidence: 99%

Superconformal Film Growth: From Smoothing Surfaces to Interconnect Technology

et al. 2023

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Conspectus Electronics manufacturing involves Cu electrodeposition to form 3D circuitry of arbitrary complexity. This ranges from nanometer-wide interconnects between individual transistors to increasingly large multilevel intermediate and global scale on-chip wiring. At larger scale, similar technology is used to form micrometer-sized high aspect ratio through-silicon vias (TSV) that facilitate chip stacking and multilevel printed circuit board (PCB) metallization. Common to all of these applications is void-free Cu filling of lithographically defined trenches and vias. While line-of-sight physical vapor deposition processes cannot accomplish this feat, the combination of surfactants and electrochemical or chemical vapor deposition enables preferential metal deposition within recessed surface features known as superfilling. The same superconformal film growth processes account for the long-reported but poorly understood smoothing and brightening action provided by certain electroplating additives. Prototypical surfactant additives for superconformal Cu deposition from acid-based CuSO4 electrolytes include a combination of halide, polyether suppressor, sulfonate-terminated disulfide, and/or thiol accelerator and possibly a N-bearing cationic leveler. Many competitive and coadsorption dynamics underlie functional operation of the additives. Upon immersion, Cu surfaces are rapidly covered by a saturated halide layer that makes the interface more hydrophobic, thereby supporting the formation of a polyether suppressor layer. Also, halide serves as a cosurfactant supporting the adsorption of amphiphilic molecular disulfide species on the surface while inhibiting copper sulfide formation and incorporation into the growing deposit. Furthermore, the dangling hydrophilic sulfonate end group of the accelerator enables activated metal deposition by hindering polyether suppressor assembly. A common thread in superconformal feature filling is additive-derived positive feedback of the metal deposition reaction within recessed or re-entrant regions. For submicrometer features or optically rough surfaces, area reduction that accompanies the motion of concave surface segments results in the most strongly bound adsorbates’ enrichment, which for the suppressor–accelerator systems is the sulfonate-terminated disulfide accelerator species. The superfilling and smoothing process is quantitatively captured by the curvature-enhanced adsorbate coverage mechanism. For larger features, such as TSV, whose depths approach the thickness of the hydrodynamic boundary layer, significant compositional and electrical gradients couple with the metal deposition process to give a negative differential resistance and related nonlinear effects on morphological evolution. For certain suppressor-only electrolytes, remarkable bottom-up feature filling occurs where metal deposition disrupts inhibiting adsorbates at the bottom of the TSV or overruns the ability of the suppressor to form due to kinetic or transport limitations. Because the electrical respon...

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“…[25] In our prior work with Electrifi on PLA substrates, [22] it was demonstrated that adding organic additives had a pronounced effect on reducing the resulting surface roughness. [26][27][28] Furthermore, while not specifically demonstrated here, levelers can also be used in other plating baths such as nickel. After plating for 8 h, the plating resulted in a shiny and far more polished looking appearance.…”

Section: Doi: 101002/admt201900126mentioning

confidence: 99%

“…Since smoother metal films can be obtained by filling concave gaps between the thermoplastic lines, additives used for Cu metallization in semiconductor and PCB processes can further improve the surface morphology of the electroplated films. [26][27][28] Furthermore, while not specifically demonstrated here, levelers can also be used in other plating baths such as nickel. [28] The electroplating process here is suitable for integration with electronics.…”

Section: Doi: 101002/admt201900126mentioning

confidence: 99%

Selective Electroplating for 3D‐Printed Electronics

Lazarus

Bedair

Hawasli

et al. 2019

Adv Materials Technologies

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In this paper, we demonstrate electroplating copper and nickel selectively onto traces printed in a highly conductive thermoplastic composite filament and use of the resulting bulk metal conductors for 3D printed electronics packaging. Electroless plating has long been used for metallization of polymer 3D printed parts [9,10] to obtain superior mechanical and electrical properties, but results in blanket deposition of metal over the entire part. Since most 3D printable plastics are difficult to directly electrolessly plate, metallization through this technique is typically a multistep process requiring roughening [11] and surface activation [12] for proper plating. Creating separate electrodes using electroless plating requires additional steps to define the conductors, for instance through laser ablation, [13] variable swelling, [14] or mechanical polishing. [15] In 2017, researchers demonstrated that conductive polymer composites can be used as a conductive seed layer for electroplating. [16] Based on this finding, we demonstrated selective electroplating of a 3D printed fused filament fabrication (FFF) part, combining conductive composite filament to define plated regions with a nonconductive plastic as a mechanical support. [17] Fused filament fabrication, the extrusion of melted thermoplastics to build a part, is a cheap and widely available 3D printing technology. [18] While successful, the composite we used was resistive relative to traditional electroplating seed layers, requiring electrical contact near the region being plated and therefore strongly limiting the complexity of the resulting parts and preventing use for electronics packaging. Building on our work, a group at Southeast University in China subsequently demonstrated the use of a similar dual filament FFF 3D printing process to define regions for selective electroless plating through selective adhesion onto two different printable polymers and showed its use for 3D printed electronic packaging. [19] Electroless plating is however significantly slower than electroplating, [20] limiting possible deposition thickness, and also unlike electroplating lacks the ability to selectively plate different thicknesses or materials on the same part. A more detailed survey of past work on electro-and electroless plating of 3D printed parts was also given in ref. [17].Here, we use a very low resistivity filament to plate centimeters from the contact point and demonstrate the ability to selectively plate complex 3D parts such as electronic packages and 3D printed circuit boards (PCBs). A very low resistivity copperbased FFF filament developed at Duke University and commercialized under the name Electrifi [21] was recently demonstrated Creating 3D-printed parts with embedded circuitry is the next frontier in additive manufacturing, but printing of conductors with performance comparable to bulk metals such as copper is a difficult challenge. A hybrid process based on 3D printing followed by electroplating on highly conductive thermoplastic filament is used to ma...

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Bottom-Up Copper Filling of Millimeter Size Through Silicon Vias

Cited by 21 publications

References 31 publications

Editors' Choice—Simulation of Copper Electrodeposition in Through-Hole Vias

Editors' Choice—Simulation of Copper Electrodeposition in Through-Hole Vias

Superconformal Film Growth: From Smoothing Surfaces to Interconnect Technology

Selective Electroplating for 3D‐Printed Electronics

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