2021
DOI: 10.1007/s11432-020-3227-1
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Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology

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Cited by 118 publications
(49 citation statements)
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“…This investigation is currently the first one employing SNNs for QSAR, proposing this technique as an alternative to classical machine learning or NN methods. Furthermore, exploring neuromorphic computation solutions as alternatives to tackle the von Neumann bottleneck problem [ 57 ] could provide new insights to drive future technologies for drug discovery and virtual screening. In von Neumann’s architecture, the chips move information continuously and at high bandwidth between the central processing unit and memory, wasting time and energy.…”
Section: Discussionmentioning
confidence: 99%
“…This investigation is currently the first one employing SNNs for QSAR, proposing this technique as an alternative to classical machine learning or NN methods. Furthermore, exploring neuromorphic computation solutions as alternatives to tackle the von Neumann bottleneck problem [ 57 ] could provide new insights to drive future technologies for drug discovery and virtual screening. In von Neumann’s architecture, the chips move information continuously and at high bandwidth between the central processing unit and memory, wasting time and energy.…”
Section: Discussionmentioning
confidence: 99%
“…However, with the rapid development of big data, Internet of Things (IoT), and artificial intelligence (AI), traditional von Neumann computers are facing a series of problems, such as high energy consumption and low processing speed, and they cannot solve complex problems. These challenges are caused by the physical separation of the memory and the processor, which is called the “von Neumann bottleneck” . By contrast, a human brain can process large amounts of information in a parallel manner via its neural networks, which consist of ∼10 11 neurons and ∼10 15 synapses .…”
Section: Introductionmentioning
confidence: 99%
“…The computing power of the hardware can be solved by increasing the parallelism of the computing unit, while the increase of the computing unit increases the data transmission requirements between the data path and the storage unit. This leads to the problem that the data transmission speed between the two modules is much lower than the calculation speed, that is, the problem of "storage wall" [3,4].…”
Section: Introductionmentioning
confidence: 99%