Bridgeless SEPIC Rectifier With Unity Power Factor and Reduced Conduction Losses

Ismail, Esam H.

doi:10.1109/tie.2008.2007552

Cited by 221 publications

(103 citation statements)

References 24 publications

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“…A bridgeless buck PFC converter for step down voltage applications was proposed. However, this buck PFC converter has high total harmonic distortion (THD) [4], [5] and low power factor. The next topology for PFC applications is the Cuk PFC converter.…”

Section: Introductionmentioning

confidence: 99%

New DCM Operated Single Phase Bridgeless Cuk Derived Converters for Power Factor Correction

Dhanasekaran¹,

Veena²,

Jeyabharath³

2016

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Section: Introductionmentioning

confidence: 99%

New DCM Operated Single Phase Bridgeless Cuk Derived Converters for Power Factor Correction

Dhanasekaran¹,

Veena²,

Jeyabharath³

2016

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“…These harmonic currents cause a lower power factor at the ac mains, voltage distortion and noise [1]- [3]. To comply with harmonic standards and to increase transmission efficiency in power systems, PFC techniques are necessary in ac-dc power converters [4], [5]. In addition, electronic equipment benefits from power converters with high efficiency over a wide range of input and output voltages [6].…”

Section: Introductionmentioning

confidence: 99%

“…However, these converters are not able to protect against the startup inrush current condition. Therefore, an additional circuit is necessary to protect against inrush current [4], [14].…”

Section: Introductionmentioning

confidence: 99%

Single-Phase Bridgeless Zeta PFC Converter with Reduced Conduction Losses

Khan¹,

Rahim²,

Bakar³

et al. 2015

Journal of Power Electronics

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This paper presents a new single phase front-end ac-dc bridgeless power factor correction (PFC) rectifier topology. The proposed converter achieves a high efficiency over a wide range of input and output voltages, a high power factor, low line current harmonics and both step up and step down voltage conversions. This topology is based on a non-inverting buck-boost (Zeta) converter. In this approach, the input diode bridge is removed and a maximum of one diode conducts in a complete switching period. This reduces the conduction losses and the thermal stresses on the switches when compare to existing PFC topologies. Inherent power factor correction is achieved by operating the converter in the discontinuous conduction mode (DCM) which leads to a simplified control circuit. The characteristics of the proposed design, principles of operation, steady state operation analysis, and control structure are described in this paper. An experimental prototype has been built to demonstrate the feasibility of the new converter. Simulation and experimental results are provided to verify the improved power quality at the AC mains and the lower conduction losses of the converter.

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“…However, the input current flows through at least three power semiconductors including two power diodes and at least one power switch such that the conduction losses on the power semiconductors become a serious problem when a high efficiency SMPS is demanded in modern power converters. A variety of the bridgeless PFC circuits have been proposed in [10]- [18] to allow the power to flow through only two power semiconductors in the line current path. Thus the conduction losses are reduced when compared to a conventional boost PFC converter.…”

Section: Introductionmentioning

confidence: 99%

Implementation of an Interleaved AC/DC Converter with a High Power Factor

Lin¹,

Li²

2012

Journal of Power Electronics

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An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

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Bridgeless SEPIC Rectifier With Unity Power Factor and Reduced Conduction Losses

Cited by 221 publications

References 24 publications

New DCM Operated Single Phase Bridgeless Cuk Derived Converters for Power Factor Correction

New DCM Operated Single Phase Bridgeless Cuk Derived Converters for Power Factor Correction

Single-Phase Bridgeless Zeta PFC Converter with Reduced Conduction Losses

Implementation of an Interleaved AC/DC Converter with a High Power Factor

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