Broadband Circuits for Optical Fiber Communication

Sackinger, E.

doi:10.1002/0471726400

Cited by 367 publications

(313 citation statements)

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“…Although the efficiency η (P out /P DC ) of a cascode is only marginally larger than the efficiency of a common emitter stage, the PAE ((P out -P in )/P DC ) is significantly better due to the larger gain of a cascode and thus smaller required input power. This higher gain stems from the suppression of the miller capacitance at the input due to the cascode [5], however, in Section III it will be shown that this isn't entirely true.…”

Section: Cascode Topology and Transistor Limitationsmentioning

confidence: 99%

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Analysis and design of a high power, high gain SiGe BiCMOS output stage for use in a millimeter-wave power amplifier

Pierco

Keulenaer

Torfs

et al. 2014

2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

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Abstract-In this paper a high gain, high power output stage designed in a 250nm SiGe BiCMOS technology is presented. The used topology together with a discussion on the stability of the output stage is explained in detail. In order to increase the gain of the output stage and thus increases the attainable power added efficiency (PAE), positive feedback is used. Furthermore a formula predicting the input impedance of a common base transistor at high frequencies is deducted which explains and predicts the magnitude of the feedback mechanism. The output stage achieves a peak gain of 14.4dB at 31GHz with a maximum output power of 22dBm.

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Section: Cascode Topology and Transistor Limitationsmentioning

confidence: 99%

“…The feedback in Fig.5 works by compensating the input capacitance of the cascode with the negative capacitance provided by the cross-coupled capacitors which exploit the Miller effect. The total capacitance at the input C in,tot is then given by the following formula [5]:…”

Section: B Feedback Mechanism and Gain Improvementmentioning

confidence: 99%

Analysis and design of a high power, high gain SiGe BiCMOS output stage for use in a millimeter-wave power amplifier

Pierco

Keulenaer

Torfs

et al. 2014

2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

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“…There are several different types of InGaAs PIN-PDs, front-ends, and packages for the candidate of the O/E converters, since the high speed digital communication and multichannel wideband analog communication have developed the high performance PINPDs, the low impedance front-end, the transimpedance front end, and the reliable packages [8]. Four different types of the O/Es were configured as a cost effective solution of the design of the O/E converter, A linear PIN-PD designed for analog modulation, and a high speed PIN-PD designed for the 2.5Gb/s or 10Gb/s speeds were used.…”

Section: O/e Converters Configured With Pin-pd and Various Type Amplimentioning

confidence: 99%

The Optimum Link Design Using a Linear PIN-PD for WiMAX RoF Communication

Chinen¹

2011

Photodiodes - Communications, Bio-Sensings, Measurements and High-Energy Physics

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“…To ensure minimum phase distortions of the input signal, the limiting amplifier is optimized for maximum group delay flatness. Even though the gain magnitude response can be constant up to a given frequency, severe phase distortions can occur below this frequency, if the group delay flatness is insufficient (Säckinger, 2005).…”

Section: Introductionmentioning

confidence: 99%

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Park

Berroth

2017

Adv. Radio Sci.

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Abstract. This paper presents the design of a limiting amplifier with 1-to-3 fan-out implementation in a 0.13 µm SiGe BiCMOS technology and gives a detailed guideline to determine the circuit parameters of the amplifier for optimum high-frequency performance based on simplified gain estimations. The proposed design uses a Cherry-Hooper topology for bandwidth enhancement and is optimized for maximum group delay flatness to minimize phase distortion of the input signal. With regard to a high integration density and a small chip area, the design employs no passive inductors which might be used to boost the circuit bandwidth with inductive peaking. On a RLC-extracted post-layout simulation level, the limiting amplifier exhibits a gain-bandwidthproduct of 14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a peak-to-peak input voltage of 1.5 mV. The group delay variation within the 3 dB bandwidth is less than 0.5 ps and the power dissipation at a power supply voltage of 3 V including output drivers is 837 mW.

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Broadband Circuits for Optical Fiber Communication

Cited by 367 publications

References 0 publications

Analysis and design of a high power, high gain SiGe BiCMOS output stage for use in a millimeter-wave power amplifier

Analysis and design of a high power, high gain SiGe BiCMOS output stage for use in a millimeter-wave power amplifier

The Optimum Link Design Using a Linear PIN-PD for WiMAX RoF Communication

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

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Broadband Circuits for Optical Fiber Communication

Cited by 367 publications

References 0 publications

Analysis and design of a high power, high gain SiGe BiCMOS output stage for use in a millimeter-wave power amplifier

Analysis and design of a high power, high gain SiGe BiCMOS output stage for use in a millimeter-wave power amplifier

The Optimum Link Design Using a Linear PIN-PD for WiMAX RoF Communication

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Contact Info

Product

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Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product