“…As serial data‐rates have continued to climb over time we have witnessed a necessary increase in attention given to the signal degradation introduced by ever smaller interconnect structures, starting at the PCB level [7, 8], with a later focus moving to the packaging [8, 9], and more recently to on‐chip structures in the higher metal levels where the transition frequencies now fall within transmission signal bandwidth and consequently analysis no longer yields to a simpler distributed RC model approach [10–15]. In the case of such small structures operating at sufficiently high frequencies it is apparent that they must be treated as sub‐miniature transmission lines, and whereas for such structures the classical equations will generally be found to be sufficiently accurate over a wide range of operating frequency, nevertheless, as signal frequencies continue to increase these small structures can also be anticipated to require a correction applied to the classical equations for the same high‐frequency effects as described earlier.…”