Buffered Direct Injection of Photocurrents into Charge-Coupled Devices

Bluzer, N.; Stehlik, R.

doi:10.1109/jssc.1978.1051000

Cited by 25 publications

(8 citation statements)

References 8 publications

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“…Thus, designing the construction and technology of the readout devices one should take into account the influence of the different parameters on the effective threshold voltage deviations. Really, if one assumes that variables in expressions (13) and (14) are independent from each other then for effective threshold voltage dispersion it follows that:…”

Section: Analysis Of the Resultsmentioning

confidence: 99%

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IR sensor readout devices with source input circuits

Сизов¹

1999

Semicond. Phys. Quantum Electron. Optoelectron.

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High performance IR imaging systems for, e. g., surveillance and reconnaissance applications, are currently basically include focal plane arrays (FPAs) with multielement scanning or staring two-dimensional matrix of PV detectors cooled down to cryogenic temperatures with a signal processor. The FPA technologies mainly include two major technologies, hybrid and monolithic. The concept of the IR FPA hybrid technology is widespread as it permits separate optimization of the parameters of the detector array with a large number of sensitive elements and typical silicon readout device coupled with the detector array [1]. The major hybrid technology uses mercury-cadmium-telluride (MCT) PV detectors and silicon CCD or CMOS chips [1, 2] for readout and multiplexing of the stored charge from the detectors; there are a lot of various designs of such interface but practically they are the source coupling or gate coupling ones [3-5]. Performance requirements for IR FPAs are considerably varied with respect to the wavelength region, background photon radiation, operating temperature, dynamic range, noise, readout rate, power dissipation, detector biases, and some other parameters. IR FPAs are mainly clustered in atmospheric window wavelength ranges 1-2.5, 3-5, 8-12 µm, and depending on the wavelength region applied, they are aimed at T ≈ 250300, 77150, 2090 K operating temperatures, respectively. The primary function of a readout device for IR arrays is to provide an IR detector charge to voltage conversion, integration of the electrons generated in photodetector, preliminary signal processing, e.g., skimming, partitioning, amplification and time multiplexing of signals from the cooled detectors in the array [4] to much less number of outputs. In the case of scanning systems, TDI function should be used to improve performance of

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Section: Analysis Of the Resultsmentioning

confidence: 99%

“…To satisfy the requirements of FPA with PV HgCdTe detectors for relatively large backgrounds operation there were chosen the unit cells with direct injection (DI) and buffered direct injection (BDI) [13] to improve the coupling between PV detector and CCD signal processor.…”

Section: Ccd and Circuit Approachesmentioning

confidence: 99%

IR sensor readout devices with source input circuits

Сизов¹

1999

Semicond. Phys. Quantum Electron. Optoelectron.

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“…In the case of large IR staring-FPAs, straightforward input topologies like source follower per detector (SFD) [31][32][33][34][35], direct injection (DI) [36][37][38][39] and gate modulation input (GMI) [31,40] are still popular because of their compactness and reduced power consumption [19]. Other complex circuit techniques like buffered direct injection (BDI) [36,41] and capacitive transimpedance amplifier (CTIA) [42][43][44]39] offer higher performance by providing excellent bias control, high injection efficiency, linearity and lower noise figures. More recent structures like share-buffered direct injection (SBDI) [45], switched-current integrator (SCI) [46] and buffered gate modulation input (BGMI) [47] are intended to provide better compromise between pixel size constraints and readout performance.…”

Section: Readout Techniquesmentioning

confidence: 99%

Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications

Margarit¹

2017

Springer Theses

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Certifiquen ResumLa present tesi doctoral descriu la recerca i el desenvolupament d'una nova tecnologia monolítica d'imatgeria infraroja de longitud d'ona mitja (MWIR), no refrigerada i de baix cost, per a usos industrials d'alta velocitat. El treball pren el relleu dels últims avenços assolits pel soci industrial NIT S.L. en el camp dels detectors MWIR de PbSe depositats en fase vapor (VPD), afegint-hi coneixement fonamental en la investigació de noves tècniques de disseny de circuits VLSI analògics i mixtes pel desenvolupament del dispositiu integrat de lectura unit al detector pixelat.Es parteix de la hipòtesi que, mitjançant l'ús de les esmentades tècniques de disseny, les tecnologies CMOS estàndard satisfan tots els requeriments operacionals del detector VPD PbSe respecte a connectivitat, fiabilitat, funcionalitat i escalabilitat per integrar de forma econòmica el dispositiu. La càmera PbSe-CMOS resultant ha de consumir molt baixa potència, operar a freqüències de kHz, exhibir bona uniformitat, i encabir els píxels actius CMOS de lectura en el pitch compacte del pla focal de la imatge, tot atenent a les particulars característiques del detector: altes relacions de corrent d'obscuritat a senyal, elevats valors de capacitat paràsita a l'entrada i dispersions importants en el procés de fabricació.Amb la finalitat de complir amb els requisits previs, es proposen arquitectures de sensors de visió de molt baix acoblament interpíxel basades en l'ús d'una matriu de pla focal (FPA) de píxels actius exclusivament digitals. Cada píxel sensor digital (DPS) està equipat amb mòduls de comunicació d'alta velocitat, autopolarització, cancel·lació de l'offset, conversió analògica-digital (ADC) i correcció del soroll de patró fixe (FPN). El consum en cada cel·la es minimitza fent un ús exhaustiu del MOSFET operant en subllindar.L'objectiu últim és potenciar la integració de les tecnologies de sensat d'imatge infraroja (IR) basades en PbSe per expandir-ne el seu ús, no només a diferents escenaris, sinó també en diferents estadis de maduresa de la integració PbSe-CMOS. En aquest sentit, es proposa investigar un conjunt complet de blocs funcionals distribuïts en dos enfocs paral·lels: viii• Dispositius d'imatgeria MWIR "Smart" basats en frames utilitzant noves topologies de circuit DPS amb correcció de l'FPN en guany i offset. Aquesta línia de recerca exprimeix el pitch del detector per oferir una programabilitat completament digital a nivell de píxel i plena funcionalitat amb compensació de la capacitat paràsita d'entrada i memòria interna de fotograma.• Dispositius de visió MWIR "Compact"-pitch "frame-free" en base a un novedós esquema d'integració analògica en el DPS i diferenciació temporal configurable, combinats amb protocols de comunicació asíncrons dins del pla focal. Aquesta estratègia es concep per permetre una alta compactació del pitch i un increment de la velocitat de lectura, mitjançant la supressió del filtrat digital intern i l'assignació dinàmica de l'ample de banda a cada píxel de l'FPA. Aquest treball ha cond...

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“…This leads to large array format and small pixel size. Due to the small pixel size, it is difficult in the design of high-resolution large IR FPA's to implement complex high-performance readout input circuits (e.g., buffered direct injection (BDI) [1], [2], capacitive transimpedance amplifier (CTIA) [3], [4], and chopper-stabilized input circuit (CSI) [5]) with a large enough in-pixel integration capacitor. Usually one uses a simple readout circuit to maintain a large enough inpixel capacitor.…”

Section: Introductionmentioning

confidence: 99%

“…So far, several developed simple current readout schemes such as the direct injection (DI) [1], [6], [7], the source follower per detector (SFD) [8], [9], and the gate-modulation input (GMI) [8], [10], have been developed and have become commonly used structures in the IR FPA readout chip. In these readout schemes, a simple circuit is used to satisfy both pixel size and power dissipation limitations while sacrificing some readout performance such as the poor injection efficiency, the detector bias nonuniformity, and the noise figures.…”

Section: Introductionmentioning

confidence: 99%

A new cryogenic CMOS readout structure for infrared focal plane array

Hsieh

Sun

1997

IEEE J. Solid-State Circuits

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A new current readout structure for the infrared (IR) focal-plane-array (FPA), called the switch-current integration (SCI) structure, is presented in this paper. By applying the share-buffered direct-injection (SBDI) biasing technique and off focal-plane-array (off-FPA) integration capacitor structure, a high-performance readout interface circuit for the IR FPA is realized with a pixel size of 50 2 50 m 2. Moreover, the correlated double sampling (CDS) stage and dynamic discharging output stage are utilized to improve noise and speed performance of the readout structure under low power dissipation. An experimental SCI readout chip has been designed and fabricated in 0.8-m double-poly-double-metal (DPDM) n-well CMOS technology. The measurement results of the fabricated readout chip at 77 K with 4 and 8 V supply voltages have successfully verified both the readout function and the performance improvement. The fabricated chip has a maximum charge capacity of 1.12 2 10 8 electrons, a maximum transimpedance of 1 2 10 9 , and ae active power dissipation of 30 mW. The proposed CMOS SCI structure can be applied to various cryogenic IR FPA's.

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Buffered Direct Injection of Photocurrents into Charge-Coupled Devices

Cited by 25 publications

References 8 publications

IR sensor readout devices with source input circuits

IR sensor readout devices with source input circuits

Low-Power CMOS Digital Pixel Imagers for High-Speed Uncooled PbSe IR Applications

A new cryogenic CMOS readout structure for infrared focal plane array

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