This paper discusses how the coupling capacitor of transmission line in high speed circuit is optimized. Take the 400G bit error tester as an example, the characteristic impedance of the transmission line before and after adding the coupling capacitor is simulated. In order to reduce impact on signal integrity caused by impedance mismatch, the treatment method of voiding is obtained through the impedance calculation formula. By comparing several different voiding scheme proposed by predecessors, on the basis of the previous work, the hollowing treatment is further optimized to study the effect of hollowing size on signal integrity. Then HFSS software is used for modeling and simulation, and the insertion loss and return loss under several different schemes are calculated. It is found that the size of the hollowing process will have a certain impact on the integrity of the signal, and to a certain extent, the larger the hollowing size, the smaller the insertion loss and return loss.