Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits

Sparkman, Brett; Smith, Scott C.; Di, Jia

doi:10.1109/vts48691.2020.9107627

Cited by 4 publications

(1 citation statement)

References 8 publications

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“…[62] avoids utilizing clock trees and sync-async interfacing circuitries, which significantly reduces the area overhead (on an average) as compared to other schemes. This work later acted as a motivation for the development of a BIST scheme for SCL circuits [63].…”

Section: Significantlymentioning

confidence: 99%

Evolution of NULL Convention Logic Based Asynchronous Paradigm: An Overview and Outlook

Khodosevych

Sakib

2022

IEEE Access

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The synchronous design paradigm dominates today's semiconductor industry. However, this clocked approach is facing major challenges with today's high-speed, low-power design expectations, using processes with ever-increasing physical level variability. Several clock related issues surface in designs operating at higher frequencies, which make clock management increasingly difficult. Quasi-delay insensitive (QDI) asynchronous (clockless) designs have proved to be effective in circumventing the major limiting factors associated with the clocked designs. NULL Convention Logic (NCL) is one such QDI asynchronous design paradigm, which presents itself as a promising alternative to conventional synchronous circuits and has already found numerous commercial applications due to its low power, robust architecture, and ease of design reuse. This paper presents the evolution of NCL based asynchronous paradigm over the past two decades, primarily focusing on existing fundamental research in NCL design automation, spanning over NCL synthesis, optimization, testing, and verification. The methods are systematically analyzed to determine their limitations and future research directions.

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Section: Significantlymentioning

confidence: 99%

Evolution of NULL Convention Logic Based Asynchronous Paradigm: An Overview and Outlook

Khodosevych

Sakib

2022

IEEE Access

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Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits using Pipeline Stage Parallelism

Sparkman

Smith

2022

J Electron Test

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Power Consumption Improvements in AES Decryption Based on Null Convention Logic

Le-Thanh

Tri

Trang

2021

International Journal of Circuits, Systems and Signal Processing

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In this paper, we propose a new asynchronous method based on a Null Convention Logic (NCL) to improve power consumption for low power integrated circuits. The reason is because the NCL based designs do not use a clock, it eliminates the problems related to the clock and its power consumption reduces significantly. To show the advantages of the selected method, we propose two design models using the synchronous circuit design method, and the NCL based asynchronous circuit design method. To test these two design models conveniently, we also propose an extra automatic test model. In this study, the AES decryption is used as an example to illustrate both methods. The two above proposed AES decryption models are simulated and synthesized at the various corners by VCS and Design Compiler tool using TSMC standard cell libraries in 65nm technology. The synthesis results of the two above mentioned models indicated that the power consumption of the NCL based asynchronous circuit model is 3 times lower than that of the synchronous circuit model, and significantly improves (from 94% to 98%) compared with the results of the other authors. The processing speed of the NCL based asynchronous circuit paradigm is able to achieve a maximum speed.

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Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits

Cited by 4 publications

References 8 publications

Evolution of NULL Convention Logic Based Asynchronous Paradigm: An Overview and Outlook

Evolution of NULL Convention Logic Based Asynchronous Paradigm: An Overview and Outlook

Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits using Pipeline Stage Parallelism

Power Consumption Improvements in AES Decryption Based on Null Convention Logic

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