Bypass anode lateral IGBT on SOI for snapback suppression

Abstract

In this letter a novel lateral insulated gate bipolar transistor with a three dimensional (3D) bypass anode design on silicon-oninsulator (SOI) is proposed and discussed. The 3D bypass anode concept makes it more effectively not only suppress the snapback effect in conducting state, but also improve the switching speed as a fast electron extraction path during turnoff without wasting the anode area. Numerical simulation results show that the proposed LIGBT structure has a 1.12 V forward voltage drop and 400 ns turnoff time at current density of 100 A/cm 2 . The proposed LIGBT saves the cell area by above 30% compared with the conventional no snapback SA-LIGBT and has about 61% reduction in turnoff time compared with the conventional LIGBT, respectively. Mostly, the proposed LIGBT can be fabricated by the conventional SOI smart power IC process without an additional process step and mask.

A novel snapback-free reverse-conducting (RC) SOI-LIGBT with a built-in thyristor

“…The diode not only consumes extra chip area but also brings parasitic loss [5]. In order to address that, various structures, e. g., the LIGBT with shorted anode (SA) [6], separated shorted anode (SSA) [7,8], segmented trenches [9], dual embedded diodes [10] and dual-gate [11,12,13] are proposed. They all realize the reverse-conducting (RC) function but still have some defects.…”