Byte-Aware Floating-point Operations through a UNUM Computing Unit

Bocco, Andrea; Jost, Tiago Trevisan; Cohen, Albert; Dinechin, Florent de; Durand, Yves; Fabre, Christian

doi:10.1109/vlsi-soc.2019.8920387

Cited by 4 publications

(2 citation statements)

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“…Although these hardware solutions are 80-200 times faster than corresponding software implementations, their computations are limited to quadruple, hexuple, and octuple precision arithmetic. In [18][19][20], a variable-precision floating-point accelerator is proposed, based on a refined version of the universal number (UNUM) type I format, for high-performance-computing servers. It is implemented as a coprocessor of the RISC-V processor generated with the Rocket-chip generator [21].…”

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confidence: 99%

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Open-Source Coprocessor for Integer Multiple Precision Arithmetic

Rudnicki¹,

Stefański

Żebrowski³

2020

Electronics

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This paper presents an open-source digital circuit of the coprocessor for an integer multiple-precision arithmetic (MPA). The purpose of this coprocessor is to support a central processing unit (CPU) by offloading computations requiring integer precision higher than 32/64 bits. The coprocessor is developed using the very high speed integrated circuit hardware description language (VHDL) as an intellectual property (IP) core. Therefore, it can be implemented within field programmable gate arrays (FPGAs) at various scales, e.g., within a system on chip (SoC), combining CPU cores and FPGA within a single chip as well as FPGA acceleration cards. The coprocessor handles integer numbers with precisions in the range 64 bits–32 kbits, with the limb size set to 64 bits. In our solution, the sign-magnitude representation is used to increase the efficiency of the multiplication operation as well as to provide compatibility with existing software libraries for MPA. The coprocessor is benchmarked in factorial ( n ! ), exponentiation ( n n ) and discrete Green’s function (DGF) computations on Xilinx Zynq-7000 SoC on TySOM-1 board from Aldec. In all benchmarks, the coprocessor demonstrates better runtimes than a CPU core (ARM Cortex A9) executing the same computations using a software MPA library. For sufficiently large input parameters, our coprocessor is up to three times faster when implemented in FPGA on SoC, rising to a factor of ten in DGF computations. The open-source coprocessor code is licensed under the Mozilla Public License.

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confidence: 99%

“…Up to now, none of the MPA processor/coprocessor results [13][14][15][16][17][18][19][20] presented in the literature have gained either immense popularity or worldwide success. In our opinion, it stems partially from the fact that none of those solutions are freely available as an open-source intellectual property (IP) core.…”

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confidence: 99%