2019
DOI: 10.20944/preprints201902.0088.v1
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Cache Misses and the Recovery of the Full AES 256 Key

Abstract: In recent years, CPU caches have revealed themselves as one of the most powerful sources of information leakage. This information leakage affects any implementation whose memory accesses, to data or instructions, depend on sensitive information such as private keys. In most cases, side-channel cache attacks do not require any specific permission and just need access to a shared cache. This fact, combined with the spread of cloud computing, where the infrastructure is shared between different customers, have ma… Show more

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Cited by 5 publications
(6 citation statements)
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“…While the threat of side channels and the availability of AES-NI hardware have resulted in declining usage of T-table AES for encryption and decryption operations, similar lessons do not seem to have been learned for the case of random number generation. Remarkably, even after more than a decade of attacks, [5,13,32,57,64] we show that unprotected and leaky T-tables are still used for encrypting the counter inside CTR_DRBG by the following popular implementations:…”
Section: A Our Contributionmentioning
confidence: 99%
“…While the threat of side channels and the availability of AES-NI hardware have resulted in declining usage of T-table AES for encryption and decryption operations, similar lessons do not seem to have been learned for the case of random number generation. Remarkably, even after more than a decade of attacks, [5,13,32,57,64] we show that unprotected and leaky T-tables are still used for encrypting the counter inside CTR_DRBG by the following popular implementations:…”
Section: A Our Contributionmentioning
confidence: 99%
“…The accesses to the tables are key dependant and not all of them are used during the encryption process. This fact has been exploited multiple times to recover the secret keys [4,9,36].…”
Section: Aes S-box Implementation In Opensslmentioning
confidence: 99%
“…The Flush+Reload [69] technique has revealed itself as one of the most reliable sources of information in cache attacks, especially when compared to the Prime+Probe technique [4,9,22,36]. The main reason is that, in the former case, observations are made on a shared memory block, whereas in the latter case, any other process running in the machine could force an eviction and the attacker would not be able to distinguish the origin of the eviction.…”
Section: Shared Memory and Detectionmentioning
confidence: 99%
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