2016 IEEE Region 10 Conference (TENCON) 2016
DOI: 10.1109/tencon.2016.7847992
|View full text |Cite
|
Sign up to set email alerts
|

CALVIS32: Customizable assembly language visualizer and simulator for intel x86-32 architecture

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
0
0

Year Published

2018
2018
2022
2022

Publication Types

Select...
1
1

Relationship

0
2

Authors

Journals

citations
Cited by 2 publications
(1 citation statement)
references
References 3 publications
0
0
0
Order By: Relevance
“…The fs segment register can access the Process Environment Block (PEB) at fs: [30]. On an x86 [8] computer, this register corresponds to a Thread Information Block (TIB).There is also a flag below the Process Environment Block (PEB) that indicates whether the first memory space of the process was created in debug mode. Provide an offset of 0x18 in the Process Environment Bloc (PEB).…”
Section: Introductionmentioning
confidence: 99%
“…The fs segment register can access the Process Environment Block (PEB) at fs: [30]. On an x86 [8] computer, this register corresponds to a Thread Information Block (TIB).There is also a flag below the Process Environment Block (PEB) that indicates whether the first memory space of the process was created in debug mode. Provide an offset of 0x18 in the Process Environment Bloc (PEB).…”
Section: Introductionmentioning
confidence: 99%