Abstract:Recent developments in memory devices have led to the proposal of a direct method of constructing combinatorial logic filter which uses bit serial operation (i.e., memory and reversible adder are used for bitwise summing of the result of weighted addition). By combinatorial construction it is possible to increase operating speed, simplify the hardware and decrease the power consumption, leading to an efficient digital filter. This paper applies bit serial operation to the canonical construction, leading to a c… Show more
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