Carrier and symbol synchronization in digital receivers using feedback compensation loop and early late gate on FPGA

Bhatti, Bilal Ahmed; Umer, Muhammad; Ahmed, Waqar; Tariq, Muhammad Hammad; Ali, Usman

doi:10.1109/icreate.2014.6828355

Cited by 5 publications

(5 citation statements)

References 2 publications

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“…In this simulation, a first-order loop filter is used with bandwidth B L = ω n 4 [7]. σ 2 u = MCRB (ε) can be substituted into formula (10) to obtain a value for MCRB DLL (ε) after the loop filter. The specific expression is as follows:…”

Section: Timing Performance Verificationmentioning

confidence: 99%

“…For scenarios with continuous incoming signals, iterative timing methods based on continuous time segment data are widely utilized and are known as feedback timing, e.g., the Gardner (GAD) method [9] and the early-late method [10], [11]. This type of method uses the results from the previous cycle for iterative estimation and offers higher estimation accuracy with less computation.…”

Section: Introductionmentioning

confidence: 99%

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Feedback Timing Method Based on Joint Optimization Function of Code Period and Timing Parameters in Non-Cooperative Communication

Qin

Wang

et al. 2019

IEEE Access

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In non-cooperative communication, the code frequency, the pulse shaping filter and other prior parameters are unknown to the receiver, which increases the challenge of non-cooperative receiving system design. A straightforward method may estimate these parameters in advance following traditional receiving systems. Estimation errors will undoubtedly be involved and passed between stages, which will decease system performance, especially in low signal-to-noise ratio (SNR) scenarios. To address this problem, this paper constructs a carefully designed optimization function for timing estimation that combines both the code frequencies and the timing parameters from multiple chips. Consequently, a feedback-based tracking model is proposed to solve such an optimization function. Finally, extensive simulation results validate the efficiency of the proposed method, which achieves ten times better accuracy than the traditional method and can partially overcome the influence of code frequency deviations. INDEX TERMS Non-cooperative communication, timing estimation, Gardner detector, self-noise, early-late detector, code loop tracking.

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Section: Timing Performance Verificationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Feedback Timing Method Based on Joint Optimization Function of Code Period and Timing Parameters in Non-Cooperative Communication

Qin

Wang

et al. 2019

IEEE Access

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“…Receiver design itself is a very difficult task which involves carrier recovery and symbol timing recovery circuits [7]. Achieving synchronization is most challenging aspect in digital communications.…”

Section: Synchronization In Receivermentioning

confidence: 99%

Synchronization in IEEE 802.15.4 Zigbee transceiver using Matlab Simulink

Gorantla

Vakamulla

2015

2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI)

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Zigbee standard has all set of protocols which supports low data rate, low power consumption, low cost and short range communications. The main application of Zigbee is Wireless Sensor Networks(WSNs). In digital communications, data is being transmitted by converting input bit stream in to sample functions of analog waveforms. When the analog RF signal passes through bandlimited channel, it results signal degradation in terms of symbol delay, carrier frequency and phase offsets. Various synchronization techniques can be used to estimate these characteristics in coherent receivers. In this paper, phase offset can be estimated using costas loop carrier recovery circuit and early late gate timing recovery algorithm is used to estimate symbol timing before data being decoded. The receiver performs well for different SNR (Signal to Noise Ratio) values varying from -10dB to 14dB. Transceiver system design is developed using Matlab Simulink and its performance can be analysed when it undergoes through Additive White Gaussian Noise (AWGN) channel and Rayleigh fading channel.Index Terms-Costas loop carrier recovery, Early late gate timing recovery, IEEE 802.15.4, LR-WPAN, Zigbee transceiver.

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“…It is commonly approached by a finite difference of the outputs from two matched filter banks, of which delays of the on-time MF banks are early and late, respectively, represented as the early-late (EL) synchronizer [27,28]. The EL-based synchronization algorithm is widely utilized for linear [29][30][31] and nonlinear [21,22,26,32] modulation schemes, since it offers high estimation accuracy with low computational cost. The general methods to reduce the complexity of the synchronization depend mainly on the simplification methods of MLSD.…”

Section: Introductionmentioning

confidence: 99%

Design and Implementation of a Low-Complexity Multi-h CPM Receiver with Linear Phase Approximation Synchronization Algorithm

Wang,

Wen,

et al. 2023

Entropy

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Multi-h continuous phase modulation (CPM), with extremely high spectral efficiency, involves the plague of high demodulation complexity with a large number of matched filters and a complex trellis. In this paper, an efficient all-digital demodulator for multi-h continuous phase modulation (CPM) is proposed based on a low-complexity decision-directed synchronization algorithm. Based on the maximum-likelihood estimation of the carrier phase and timing errors, we propose a reduced-complexity timing error detector with linear phase approximation (LPA) to the phase of the multi-h CPM. Compared with the traditional synchronization methods, it avoids derivative matched filtering and reduces about 2/3 of matched filters. The estimated accuracy and bit error rate (BER) performance of the LPA-based synchronization algorithm have no loss, as shown by the numerical simulation. Its stability is verified by the derived S-curve. Then, the receivers with the LPA-based synchronization for the three kinds of promising multi-h CPM are implemented on a Xilinx Kintex-7 FPGA platform. The experimental results show that the onboard tested BER of the proposed design has an ignorable loss in the numerical simulation. The implementation overhead on FPGA is significantly reduced by about 27% slices, 64% DSPs, and 70% block RAMs compared with the conventional method.

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Carrier and symbol synchronization in digital receivers using feedback compensation loop and early late gate on FPGA

Cited by 5 publications

References 2 publications

Feedback Timing Method Based on Joint Optimization Function of Code Period and Timing Parameters in Non-Cooperative Communication

Feedback Timing Method Based on Joint Optimization Function of Code Period and Timing Parameters in Non-Cooperative Communication

Synchronization in IEEE 802.15.4 Zigbee transceiver using Matlab Simulink

Design and Implementation of a Low-Complexity Multi-h CPM Receiver with Linear Phase Approximation Synchronization Algorithm

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