Carrier Density near the Semiconductor‐Insulator Interface. Local Density Approximation for Non‐Isotropic Effective Mass

Abstract

For bent bands in a semiconductor near the interface to an insulator, a modified local density approximation is described which takes into account the influence of the interface barrier in the potential. Simple expressions are obtained for the electron and hole densities in a multi-valley semiconductor with non-isotropic parabolic bands. Due to the interface barrier the densities decrease to zero towards the interface. The characteristic length for this decrease is determined by the effective mass tensor and by the orientation of the interface. Results of self-consistent density calculations are reported.Fur die in Nahe der Grenzflache zu einem Isolator verbogenen Halbleiterbander wird eine modifizierte Niherung der lokalen Dichte beschrieben, die den Potentialsprung an der Grenzflache beriicksichtigt. Es ergeben sich einfache Ausdriicke fur die Elektronen-und Locherdichten eines Vieltalhalbleiters mit anisotropen parabolischen Bandern. Durch den EinfluB der Potentialbarriere gehen die Dichten zur Grenzfliche hin gegen Null. Die fiir diesen Abfall charakteristische Lange ist durch den Effektivmnssentensor und durch die Orientierung der Grenzflache bestimmt .Es werden Resultate selbstkonsistenter Dichteberechnungen angegeben.

Layer Thickness and Stress-Dependent Correction for InGaAs Low-Field Mobility in TCAD Applications

“…In contrast to the SE, the calculation of the MLDA DOS avoids an explicit subband representation while still providing accurate results for the inversion charge [9], [10].…”

“…We use the modified local density approximation (MLDA) [9] to compute the carrier DOS considering interface confinement. In contrast to the SE, the calculation of the MLDA DOS avoids an explicit subband representation while still providing accurate results for the inversion charge [9], [10].…”

“…Previously, quantum correction models for TCAD simulation were developed to account for confinement induced by one semiconductor/insulator interface in [7]- [9], and recently, it was extended to account for the impact of geometric quantum confinement in double-gate structures [4], [10].…”

Quantum correction for DG MOSFETs

“…In order to obtain proper results at significantly reduced CPU time, several quantum correction models for classical simulations have been proposed [1][2][3][4][5]. However, some of these corrections are based on empirical fits with numerous parameters [4,5].…”

Current transport models for nanoscale semiconductor devices

“…Various quantum correction models are available [107][108][109][110][111]. Some of these are based on empirical fits with numerous parameters [108,109].…”