Catastrophic Fault Diagnosis of a Certain Class of Nonlinear Analog Circuits

Abstract

This paper deals, for the first time, with catastrophic fault diagnosis of nonlinear analog circuits containing bipolar and MOS transistors having multiple operating points (DC solutions). The faults are cuts of some connecting paths and short-circuits of some pairs of points. Simulation-before-test approach is applied for detection and identification of a single catastrophic fault. To build a fault dictionary, a diagnostic test is arranged based on DC analysis. In the discussed circuits having multiple DC solutions, the tested output voltage may assume different values for fixed value of the input voltage. This fact considerably complicates the fault diagnosis. The crucial point of the proposed approach is tracing large number of nonlinear multivalued input-output characteristics at different values of circuit parameters within their tolerance ranges. For this purpose an efficient and fast algorithm is developed, based on the theory known under the name a linear complementarity problem. To illustrate the proposed approach and show its efficiency, four numerical examples are given.

Analog Circuit Specification Testing by Means of Walsh–Hadamard Transform and Multiple Regression Supported by Evolutionary Computations

“…The 100 patterns for the CUT discrete elements parameters dispersed randomly in their tolerance regions δ DEV = ± 5% (set I) and for eight Table 4 CUT performance parameters estimation errors and their standard deviations assumed special cases with the one selected element value shifted from the nominal point and randomly determined other ones (set II) were tested during this experiment. The filter circuit performance parameters were calculated basing on the regression models found evolutionarily (22)(23)(24)(25)(26)(27)(28)(29)(30)(31). Finally, identically as in [31], the CUT pattern is classified into the good ones if all the tested performance parameters do not exceed the allowed tolerance absolute deviation ± | p i | from the nominal level specified and to the faulty ones otherwise ( Table 5).…”

“…The parametric local and global faults of transistors of CMOS structure based on homotopy idea and the simplicial algorithm were proposed in [28]. Catastrophic fault detection method dedicated to nonlinear circuits was described in [29]; however, work [30] presents the technique dedicated to the diagnosis of spot defects. In works [24,26,27], the approaches based on sensitivity analysis for faulty element identification, test measurements ambiguity sets determination and optimal frequency of testing signal selection, respectively, may be found.…”

Spot Defect Diagnosis in Analog Nonlinear Circuits with Possible Multiple Operating Points

“…7). In this circuit we calculate the transfer and input characteristics v−v o and v−i using a very fast and effective method based on the theory named a linear complementarity problem [4,7,24,27]. During this process v is automatically increased or decreased and for each achieved value of v the attached values v o and i are found and resistance R=v/i is computed.…”

“…Otherwise, the method is classified as the simulation-before test (SBT) approach. In the last case the results of circuit simulations are stored as patterns in a fault dictionary, e.g., [10,14,19,27]. By comparing some quantities, obtained on the basis of measurement, with the patterns contained in the dictionary the fault can be located and identified.…”

“…Since it is unknown, all the operating points should be considered during fault diagnosis. Reference [27] is the only work in the area of the fault diagnosis of the analog circuits having multiple DC operating points. The problem is essential because even if the fault-free circuit has a unique DC operating point, the faulty circuit may have multiple operating points [27].…”