CFD code adaptation to the FPGA architecture

Abstract

For the last years, we observe the intensive development of accelerated computing platforms. Although current trends indicate a well-established position of GPU devices in the HPC environment, FPGA (Field-Programmable Gate Array) aspires to be an alternative solution to offload the CPU computation. This paper presents a systematic adaptation of four various CFD (Computational Fluids Dynamic) kernels to the Xilinx Alveo U250 FPGA. The goal of this paper is to investigate the potential of the FPGA architecture as the future infrastructure able to provide the most complex numerical simulations in the area of fluid flow modeling. The selected kernels are customized to a real-scientific scenario, compatible with the EULAG (Eulerian/semi-Lagrangian) fluid solver. The solver is used to simulate thermo-fluid flows across a wide range of scales and is extensively used in numerical weather prediction. The proposed adaptation is focused on the analysis of the strengths and weaknesses of the FPGA accelerator, considering performance and energy efficiency. The proposed adaptation is compared with a CPU implementation that was strongly optimized to provide realistic and objective benchmarks. The performance results are compared with a set of server CPUs containing various Intel generations, including Intel SkyLake-based CPUs as Xeon Gold 6148 and Xeon Platinum 8168, as well as Intel Xeon E5-2695 CPU based on the IvyBridge architecture. Since all the kernels belong to the group of memory-bound algorithms, our main challenge is to saturate global memory bandwidth and provide data locality with the intensive BRAM (Block RAM) reusing. Our adaptation allows us to reduce the performance per watt up to 80% compared to the CPUs.

Specialized fluid estimation implementation on the FPGA

“…So, the high-bandwidth data transmission would become extremely beneficial to augment the performance of these kernel. So, the 2.5D blocking was developed: for data migrating between each layer of the BRAM, there is only one layer of data downloaded into the BRAM block from the global memory [12]. So, the overall demand on the memory bandwidth is decreased.…”

High-Performance Computing Architecture for Sample Value Processing in the Smart Grid

“…In [17], a software package that implements the Conjugate Gradient algorithm for the Xilinx U280 Alveo accelerator card is presented. In [18], the Xilinx Alveo U250 FPGA architecture was investigated as the infrastructure capable of developing complex numerical simulations. The FPGA global memory bandwidth was saturated, and the kernel version was optimized using the OpenCL standard.…”

“…Hardware Description [15] Conjugate Gradient for Lattice Quantum Chromodynamics U250 Performance comparison to the standard CPU architectures (BRAM/DSP/F-F/LUT/URAM) [17] Conjugate Gradient for Lattice Quantum Chromodynamics U280 A software package which implements the CG algorithm for FPGA-based accelerator cards which can serve as a backbone for many applications which are expected to gain a significant boost factor on FPGA accelerators. [18] Computational Fluids Dynamic U250 Performance and energy efficiency of FPGA cards for Computational Fluids Dynamic codes. Performance achieved for all the CFD kernels using a throughput expressed in GB/s and power dissipation using performance per watt metric.…”

Architectural Adaptation and Performance-Energy Optimization for CFD Application on AMD EPYC Rome

“…Particularly, the last statement relates to stencil-based codes -a class of memory-bound applications that are quite common among scientific applications [18]. The stencil computations have traditionally been optimized by many authors over the years, especially considering various hardware platforms such as multicore CPUs [19], short-vector SIMD architectures [20], Intel Xeon Phi [21], GPU [22] and FPGA [23] accelerators. One of the main directions of improving the efficiency of stencil computations is focused around different methods for the domain decomposition [24], including overlapping neighbor domains [25].…”