Challenges for Sige Bicmos in Advanced-Node SOI

Abstract

A 45nm BiCMOS process, based on PDSOI CMOS, with SiGe HBT NPNs having f T/f MAX = 380/550GHz is presented. The bipolars are integrated on a PDSOI wafer in an epitaxial region above the handle wafer to avoid self-heating concerns. The paper reviews advantages and challenges to integrating SiGe BiCMOS on an advanced node SOI technology.