2005
DOI: 10.1016/j.mee.2005.04.088
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Challenges in the implementation of low-k dielectrics in the back-end of line

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Cited by 102 publications
(54 citation statements)
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“…Therefore, many companies choose the FSG material to be used for both 180 and 130 nm technological nodes [2,3]. For the low k material of the second generation [4][5][6][7], the low k materials with low dielectric constants are the silsesquioxane based material and organosilicate glass (OSG) using plasma enhanced chemical vapor deposition (PECVD). As compared to conventional SiO 2 , the OSG has the lower dielectric constant because its density can be lowered by the breaking three dimensional network of Si-O-Si bond and incorporating Si-H or Si-R termination (where R is an organic moiety such as CH 3 ).…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, many companies choose the FSG material to be used for both 180 and 130 nm technological nodes [2,3]. For the low k material of the second generation [4][5][6][7], the low k materials with low dielectric constants are the silsesquioxane based material and organosilicate glass (OSG) using plasma enhanced chemical vapor deposition (PECVD). As compared to conventional SiO 2 , the OSG has the lower dielectric constant because its density can be lowered by the breaking three dimensional network of Si-O-Si bond and incorporating Si-H or Si-R termination (where R is an organic moiety such as CH 3 ).…”
Section: Introductionmentioning
confidence: 99%
“…Additional porosity can be introduced in the material, either through a sol-gel process or by inclusion of sacrifi cial nanoparticles (i.e., porogens), which are decomposed and desorbed during a high-temperature bake step. Introducing pores in a dielectric poses several challenges for successful integration into microelectronic circuits [17,18]. The mechanical strength of the dielectric is reduced by porosity, potentially leading to failure during chemical mechanical planarization (CMP) [19,20,21,22] or during wire bonding to the fi nished chip [23].…”
Section: Introductionmentioning
confidence: 99%
“…Modern ICs can be made very compact, incorporating up to several billions transistors and other electronic components in an area of about 1 cm 2 . All transistors and other IC components have to be electrically interconnected to provide the proper functionality.…”
mentioning
confidence: 99%
“…[1][2][3][4][5][6][7] However, the active ongoing development of new dielectric materials for technology nodes beyond 22 nm requires fast progress in low-k implementation and reviews of the state-of-the-art require continuous updates. According to present knowledge, low-k materials with dielectric constants of about 2.4-2.5 still can be used for the 10 nm technology node.…”
mentioning
confidence: 99%