Channel thickness-dependent mobility degradation in planar junctionless transistors

Jeon, Dae‐Young

doi:10.7567/1347-4065/ab5d66

Cited by 6 publications

(2 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The g m shoulder and d g m /d V g peaks are not present in Figure b,c, although the estimated N d_eff ≈ 8 × 10 18 cm –3 at V gb = 80 V (see also Figure S3) is similar to a highly doped value in a typical JLT channel. , Previous studies have shown that unique properties such as the g m and d g m /d V g features are strongly influenced by the parasitic series resistance and channel geometry. − …”

Section: Results and Discussionmentioning

confidence: 71%

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Jeon

Park

et al. 2023

ACS Appl. Mater. Interfaces

Self Cite

View full text Add to dashboard Cite

Junctionless transistors are suitable for sub-3 nm applications because of their extremely simple structure and high electrical performance, which compensate for short-channel effects. Two-dimensional semiconductor transition-metal dichalcogenide materials, such as MoS2, may also resolve technical and fundamental issues for Si-based technology. Here, we present the first junctionless electric-double-layer field-effect transistor with an electrostatically highly doped 5 nm thick MoS2 channel. A double-gated MoS2 transistor with an ionic-liquid top gate and a conventional bottom gate demonstrated good transfer characteristics with a 104 on–off current ratio, a 70 mV dec–1 subthreshold swing at a 0 V bottom-gate bias, and drain-current versus top-gate-voltage characteristics were shifted left significantly with increasing bottom-gate bias due to an electrostatically increased overall charge carrier concentration in the MoS2 channel. When a bottom-gate bias of 80 V was applied, a shoulder and two clear peak features were identified in the transconductance and its derivative, respectively; this outcome is typical of Si-based junctionless transistors. Furthermore, the decrease in electron mobility induced by a transverse electric field was reduced with increasing bottom-gate bias. Numerical simulations and analytical models were used to support these findings, which clarify the operation of junctionless MoS2 transistors with an electrostatically highly doped channel.

show abstract

Section: Results and Discussionmentioning

confidence: 71%

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Jeon

Park

et al. 2023

ACS Appl. Mater. Interfaces

Self Cite

View full text Add to dashboard Cite

show abstract

“…16 Bulk conduction-based multilayer MoS 2 transistors exhibit less mobility degradation at a higher V g , as is also true of JLTs. 5,17 As V gt increases, so too does g m , reaching a maximum before being degraded by enhancement of the transverse E-field by the gate bias. The degradation is more severe for thin than thick t MoSd 2 (blue curve in Figure 3e) because the bulk neutral:surface accumulation channel ratio becomes lower as the MoS 2 structure becomes thinner.…”

Section: ■ Results and Discussionmentioning

confidence: 99%

Channel Thickness-Dependent Degradation of Field-Effect Mobility in Multilayer MoS₂Transistors

Jeon,

Joo,

Lee

et al. 2023

ACS Appl. Electron. Mater.

Self Cite

View full text Add to dashboard Cite

Two-dimensional (2D) semiconductors such as molybdenum disulfide (MoS 2 ) may serve as state-of-the-art logic devices as we progress toward the 2 nm technology node. Here, we show that mobility degradation is influenced by the channel thickness of multilayer MoS 2 transistors. Thicker MoS 2 channels exhibited less degradation of field-effect mobility caused by the transverse electric field (E-field), given the considerable bulk conduction current. Kelvin probe force microscopy (KPFM) was used to measure the channel thickness-dependent contact potential difference gradient. Numerical simulation confirmed that the vertical E-field was well screened by the bulk conduction channel. The results enhance our understanding of multilayer MoS 2 transistor operation and will enable performance optimization.

show abstract

Simple estimation of intrinsic electrical parameters in junctionless transistors

Jeon

2020

AIP Advances

View full text Add to dashboard Cite

Junctionless transistors (JLTs) are an attractive candidate for advanced complementary metal oxide semiconductor technologies, but their mode of operation is very different from that of conventional inversion-mode transistors. In this study, we explore the close relationship between the key electrical parameters of JLTs, such as doping concentration (Nd), threshold voltage (Vth), and flat-band voltage (Vfb). The separation between Vfb and Vth in JLTs increases linearly with Nd, and the rate of increase in the separation was affected by the maximum depletion depth (Dmax) at given Nd. These findings will enable researchers to estimate simply the Nd or Vfb values of not only JLTs but also JLT-like multi-layer transition metal dichalcogenide-based transistors.

show abstract

Channel thickness-dependent mobility degradation in planar junctionless transistors

Cited by 6 publications

References 15 publications

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Channel Thickness-Dependent Degradation of Field-Effect Mobility in Multilayer MoS₂Transistors

Simple estimation of intrinsic electrical parameters in junctionless transistors

Contact Info

Product

Resources

About

Channel thickness-dependent mobility degradation in planar junctionless transistors

Cited by 6 publications

References 15 publications

Junctionless Electric-Double-Layer MoS2 Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Junctionless Electric-Double-Layer MoS2 Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Channel Thickness-Dependent Degradation of Field-Effect Mobility in Multilayer MoS2Transistors

Simple estimation of intrinsic electrical parameters in junctionless transistors

Contact Info

Product

Resources

About

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Channel Thickness-Dependent Degradation of Field-Effect Mobility in Multilayer MoS₂Transistors