2016
DOI: 10.1088/1674-1056/25/10/108502
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Characteristics of cylindrical surrounding-gate GaAs x Sb 1− x /In y Ga 1− y

Abstract: A III-V heterojunction tunneling field-effect transistor (TFET) can enhance the on-state current effectively, and GaAs x Sb 1−x /In y Ga 1−y As heterojunction exhibits better performance with the adjustable band alignment by modulating the alloy composition. In this paper, the performance of the cylindrical surrounding-gate GaAs x Sb 1−x /In y Ga 1−y As heterojunction TFET with gate-drain underlap is investigated by numerical simulation. We validate that reducing drain doping concentration and increasing gate-… Show more

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Cited by 8 publications
(7 citation statements)
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References 19 publications
(25 reference statements)
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“…The TFET can achieve an SS value less than 60 mV/decade at room temperature due to the fact that the carrier injection of the device from source region to channel region is based on band-to-band tunneling (BTBT). [1] Moreover, the TFET can offer other advantages such as low I off when the barrier width at the source-channel junction is very large in the off-state, [2][3][4] high immunity against short-channel effects (SCEs), and small supply voltage below 0.5 V. [5,6] However, the TFET has some shortcomings such as low I on , ambipolar current (I amb ), and large Miller capacitance. The I on should be enhanced and ambipolar behavior and Miller capacitance should be well reduced in order to make TFET a better application prospect in the future integrated circuit.…”
Section: Introductionmentioning
confidence: 99%
“…The TFET can achieve an SS value less than 60 mV/decade at room temperature due to the fact that the carrier injection of the device from source region to channel region is based on band-to-band tunneling (BTBT). [1] Moreover, the TFET can offer other advantages such as low I off when the barrier width at the source-channel junction is very large in the off-state, [2][3][4] high immunity against short-channel effects (SCEs), and small supply voltage below 0.5 V. [5,6] However, the TFET has some shortcomings such as low I on , ambipolar current (I amb ), and large Miller capacitance. The I on should be enhanced and ambipolar behavior and Miller capacitance should be well reduced in order to make TFET a better application prospect in the future integrated circuit.…”
Section: Introductionmentioning
confidence: 99%
“…5. Using the high-κ gate dielectric in the GL-TFET can increase the electric field at the source-channel tunneling junction because of the improved control capability of the gate voltage, which results in the reduction of the tunneling width at the source/channel Energy/eV 7.246T10 27 1.467T10 25 2.972T10 22 6.019T10 19 1.219T10 17 2.469T10 14 0 3.585T10 31 1.759T10 28 8.630T10 24 4.234T10 21 2.077T10 18 1.019T10 15 0 4.932T10 32 1.563T10 29 4.954T10 25 1.570T10 22 4.977T10 18 1.578T10 15 0 1.403T10 30 1.181T10 27 9.948T10 23 8.376T10 20 7.053T10 17 5.938T10 14 interface. [33] The high-κ dielectric favors an increased tunneling rate that leads to enhancement in I ON , which can be seen in Fig.…”
Section: On-state Current Performancementioning
confidence: 99%
“…[8] In order to boost I ON , various techniques have been reported with simulation and experimental results. [9][10][11][12][13][14][15][16][17][18][19][20][21][22] Among them, an L-shaped TFET (L-TFET) has been proposed to increase the tunneling area by transforming the point-tunneling (parallel to channel) into linetunneling (perpendicular to channel). [21,22] Recently, Kim et al experimentally demonstrated that an L-shaped TFET can provides more than 1000 times higher ON-current than a conventional planar TFET due to the larger tunnel junction area.…”
Section: Introductionmentioning
confidence: 99%
“…Due to its band-to-band tunneling (BTBT) based carrier injection mechanism, TFET can overcome the 60 mV/dec subthreshold swing limitation of conventional MOSFET. [9][10][11][12][13][14][15] However, low on-current and sizeable ambipolar current are major shortcomings of traditional silicon-based TFET, which limit the use of TFET in low-power and high-frequency applications. [16][17][18][19][20][21] To improve the drive current while reducing the footprint of TFET, various L-shaped architectures based on gate-source overlap structure and vertical channel have been proposed.…”
Section: Introductionmentioning
confidence: 99%