Characteristics of MgO/GaN gate-controlled metal–oxide– semiconductor diodes

Abstract

Gate-controlled n+p metal–oxide–semiconductor diodes were fabricated in p-GaN using MgO as a gate dielectric and Si+ implantation to create the n+ regions. This structure overcomes the low minority carrier generation rate in GaN and allowed observation of clear inversion behavior in the dark at room temperature. By contrast, diodes without the n+ regions to act as an external source of minority carriers did not show inversion even at measurement temperatures of 300 °C. The gated diodes showed the expected shape of the current–voltage characteristics, with clear regions corresponding to depletion and inversion under the gate. The MgO was deposited prior to the Si implantation and was stable during the activation annealing for the Si-implanted n+ regions.

GaN enhancement mode metal‐oxide semiconductor field effect transistors

“…GaN-based MOS transistors are expected to have lower leakage currents and power consumption and capability for greater voltage swings relative to the more common Schottky-gate devices and also higher current gain cutoff frequency due to a smaller input capacitance [1][2][3][4][5][6][7][8] /eV-cm 2 (at E c -E t = 0.42 eV from AC conductance measurements) [9][10][11][12]. Gate-controlled MgO/GaN diodes exhibiting inversion characteristics have previously been reported, and these advances in realizing gated MOS diodes on GaN suggest that enhancement-mode MOSFETs are achievable [10,11]. In this paper, an initial demonstration of enhancement mode MOSFETs using MgO as a gate dielectric on p-GaN is reported.…”

Nanometer‐Thick Single‐Crystal Hexagonal Gd2O3 on GaN for Advanced Complementary Metal‐Oxide‐Semiconductor Technology

“…The intensive efforts in growing high-k dielectrics, such as single crystal Gd 2 O 3 [6] and MgO, [7] amorphous Ga 2 O 3 (Gd 2 O 3 ) (GGO), [8,9] HfO 2, [10] and Al 2 O 3 [11] on GaN for the past few years have achieved atomically smooth oxide/semiconductor interfaces, low gate-leakage currents, and low interfacial density of states (D it ). However, very importantly, the high-k dielectrics on GaN with CETs 1 nm have not been reached previously.…”

Selective dry etching of (Sc2O3)x(Ga2O3)1−x gate dielectrics and surface passivation films on GaN

“…The materials reported for gate oxide/insulators include SiO 2 , 2-9 Gd(Ga 2 O 3 ), 4-6 AlN 10 SiN x , [11][12][13][14] MgO, 5,15 and Sc 2 O 3 . [16][17][18] GaN MOSFETs are far less developed than for Si or even SiC. Most work in this area has focused on the amorphous dielectrics and, in particular, on SiO 2 .…”