Characterization of a fabrication process for the integration of superconducting qubits and rapid-single-flux-quantum circuits

Abstract

In order to integrate superconducting qubits with rapid-single-flux-quantum (RSFQ) control circuitry, it is necessary to develop a fabrication process that fulfills at the same time the requirements of both elements: low critical current density, very low operating temperature (tens of milliKelvin) and reduced dissipation on the qubit side; high operation frequency, large stability margins, low dissipated power on the RSFQ side. For this purpose, VTT has developed a fabrication process based on Nb trilayer technology, which allows the on-chip integration of superconducting qubits and RSFQ circuits even at very low temperature. Here we present the characterization (at 4.2 K) of the process from the point of view of the Josephson devices and show that they are suitable to build integrated superconducting qubits. Characterization of a fabrication process for the integration of qubits and RSFQ circuits 2 IntroductionOn the way towards a reliable and scalable quantum computer, superconducting qubits are promising candidates that are being developed worldwide [1]. To achieve the requested performance on-chip control and readout is of the utmost importance. A viable solution is rapidsingle-flux-quantum (RSFQ) logic, the most advanced superconducting digital technology, which is based on overdamped Josephson junctions [2].Ideally, the qubits must operate at very low temperature, in an environment with low dissipation to preserve the coherent behaviour, with control and readout circuit placed as close as possible, preferably integrated on-chip. These requirements are fulfilled by single-flux-quantum digital circuits, which are fast, scalable, require a very low power and share the same fabrication technology of at least some of the qubits (e.g. phase qubits, based on Josephson junctions, and flux qubits, based on Josephson interferometers).RSFQ logic has been investigated during many years, yielding to the development of complex circuits [3], optimized however for a range of temperatures and critical current densities different from those useful for qubits. Besides, at very low temperature the tolerable dissipated power is severely limited by the low refrigerating power of dilution refrigerators close to the base temperature. As a result, building an on-chip RSFQ circuit to control and read out qubits requires a new optimization procedure, a new design of the layout and a new fabrication process.Recently, a process satisfying these requirements has been developed by VTT. In the process, electron thermalization of the RSFQ part is improved by the use of copper cooling fins. To minimize dissipation, a target critical current density as low as 30 A/cm 2 is used. Here we characterize the process from the point of view of the Josephson junctions; measurements carried out at 4.2 K assess the good quality of unshunted junctions and their potential to build qubits.

Digital Coherent Control of a Superconducting Qubit

“…A second straightforward modification to suppress QP poisoning would be to move from a high-J c process for the SFQ driver circuit to a low-J c , millikelvin-optimized process. SFQ control elements should remain robust against fluctuations at millikelvin temperatures for critical currents that are two orders of magnitude smaller than those used in the current work [48]; as the energy dissipated per phase slip scales linearly with critical current, a millikelvin-optimized SFQ driver is expected to generate nonequilibrium QPs at a factor ∼100 lower rate. The inductances required for such an SFQ pulse driver would be correspondingly larger, leading to a larger physical footprint for the SFQ controller; global optimization of the SFQ control system would require tradeoffs between dissipation and physical size.…”

Electrodynamics of Highly Spin-Polarized Tunnel Josephson Junctions

“…The estimated Q 0 values at 4.2 K are up to two orders of magnitude higher compared to those of standard SFS heterostructures that typically operate in the overdamped regime like SNS JJs, with β ranging from 10 −3 to 10 −1 [33,34,57]. Q 0 values are of the same order of magnitude of conventional SIS junctions commonly used to drive and for the read-out of components in quantum and classical circuits [58,59]. Moreover, the Q 0 values increase up to one order of magnitude for the 4.0 nm thick barrier, when lowering T to 300 mK.…”

Impedance Matching of Microstrip Inductors in Digital Superconductive Electronics

“…Table II shows a summary of the impedance limitations as simulated and measured for the 1 process as well as extrapolated values for much higher and lower critical current densities. If a very low critical current density of 30 as provided by [14] is used for a junction with critical current of 10 , it does not allow a line width larger than 8 and in some cases, it has to be below 2. 8 .…”