Characterization of annealed oxides on n-type 6HSiC by high- and low-frequency CV-measurements

Interface properties of metal-oxide-semiconductor structures on n-type 6H and 4H-SiC

“…This may be an explanation for the unexpected low interface state densities near midgap reported together with extremely high values in the flatband region. 10,11 The experimental results presented in this article indicate the validity of the proposed theoretical considerations. It should be emphasized, that in addition to the above restrictions all the limitations of the capacitance voltage methods discussed in Ref.…”

Remote plasma-assisted oxidation of SiC: a low temperature process for SiC–SiO2 interface formation that eliminates interfacial Si oxycarbide transition regions

“…The surface of the on-axis sample was prepared from a bulk ingot and the surface of the off-axis sample used in these studies was from an epitaxially grown film. The surfaces of the wafers were cleaned following a procedure suggested by Cree Research, Inc. [42]. The ex situ cleaning consisted of (i) sequential rinses in trichloroethane (TCE), acetone and methanol, followed by (ii) a conventional two-bath RCA clean.…”

“…The attainment of low defect densities required two annealing steps: (i) a post-oxidation Ar/H 2 mixture at 1150 • C and (ii) a conventional PMA in an H 2 containing ambient at 400 • C after metallization. When annealing procedures that did not include H 2 in the 1150 • C anneal were applied to the RPAO-formed interfaces, the D it values were significantly higher, in the 10 13 cm −2 eV −1 range [42]. However, as shown in [27], these D it values were significantly reduced for the RPAO interfaces following a high temperature (1150 • C) anneal in an Ar/H 2 mixture.…”

“…This section summarizes results of recent electrical measurements made on MOS capacitors, in particular it compares values of D it as extracted from capacitance-voltage measurements on SiC interfaces prepared on p-type substrates and employed off-axis wafers with Si surface terminations. The experimental studies of Stein von Kaminski et al [42] have demonstrated mid-gap D it values in the low 10 11 cm −2 eV −1 range for interfaces prepared by high temperature thermal oxidation. These device structures used metal electrodes.…”

Effects of gamma-ray irradiation on the electrical characteristics of SiC metal-oxide-semiconductor structures

“…During the final stage of the oxidation, the samples were removed from the furnace to be cooled to room temperature quite rapidly in order to interrupt chemical reactions near the SiO 2 /6H-SiC interface. An annealing process just after oxidation at high temperature (post-oxidation annealing), which may reduce the amounts of interface traps and trapped charges in oxide layers [13], was omitted in order to clarify the effects of the oxidation process on the electrical characteristics of the SiO 2 /6H-SiC interface. The same process was carried out for 10 min to form oxide layers 30 nm thick on the carbon face.…”