Characterization of the gate oxide of an AlGaN/GaN high electron mobility transistor

Abstract

A subnanometer thick interfacial oxide layer present between the Ni/Au gate metal stack and semiconducting epilayers of an AlGaN/GaN high electron mobility transistor was characterized using high-angle annular dark-field scanning transmission electron microscopy and laser-assisted atom probe tomography. It was revealed that the oxide is composed of distinct Ni-oxide-rich and Al-oxide-rich layers with no Ga-oxide detected. The results provide information that is of potential importance in determining failure mechanisms and improving reliability of AlGaN/GaN high electron mobility transistors.

Under-gate defect formation in Ni-gate AlGaN/GaN high electron mobility transistors

“…In particular, changes to the physical structure of the HEMT during stressing can induce conditions, which could lead to additional leakage current through the gate electrode [11,21]. Several groups have reported a reaction between the Ni liner layer and the AlGaN epitaxial layer observed via highangle annular dark-field scanning transmission electron microscopy (HAADF-STEM) [21,22]. When stressing occurs in N 2 ambients, this reaction manifests itself as ''sinking'' whereby the Ni layer appears to diffuse down and consume the underlying AlGaN layer and make electrical contact to the 2DEG.…”

GaN High Electron Mobility Transistor Degradation: Effect of RF Stress

“…3). Reverse gate bias step stressing of these particular devices, as well as others, have shown to result in the consumption of the oxide layer present between the Schottky contact and underlying semiconductor layer (14,32,33,37). This has been correlated to an increase in threshold voltage and a decrease in I DSS .…”

Investigation of temperature dependent threshold voltage variation of Gd2O3/AlGaN/GaN metal-oxide-semiconductor heterostructure

“…It was reported that a sub nanometer thick interfacial layer (AlOx and NiOx) present between the Ni/Au gate metal stack and AlGaN epilayer. 15 As the V th shift is minimum in the whole temperature range, the control devices shows good thermal stability at elevated temperature. In case of as-deposited device, RT C-V shows a small hysteresis window of 0.2V [shown in inset of Fig.…”