Characterizing Parallel Scientific Applications on Commodity Clusters: An Empirical Study of a Tapered Fat-Tree

León, Edgar A.; Karlin, Ian; Bhatele, Abhinav; Steven, H; Chambreau, Chris; Louis, H Howell; D'Hooge, Trent; Matthew, L Leininger

doi:10.1109/sc.2016.77

Cited by 14 publications

(12 citation statements)

References 20 publications

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“…This cost-performance trade-off, known as "right-sizing the interconnect", is important for the overall effectiveness of the HPC system. Interconnects in large HPC systems that are currently deployed may be over-provisioned [14,15]. Careful choices in the design of future interconnects could result in significant cost reductions and only a small performance penalty.…”

Section: Contentsmentioning

confidence: 99%

Understanding congestion in high performance interconnection networks using sampling

Taffet

Mellor-Crummey

2019

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

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Understanding Congestion in High Performance Interconnection Networks Using Sampling by Philip A. Taffet The computational needs of many applications outstrip the capabilities of a single compute node. Communication is necessary to employ multiple nodes, but slow communication often limits application performance on multiple nodes. To improve communication performance, developers need tools that enable them to understand how their application's communication patterns interact with the network, especially when those interactions result in congestion. Since communication performanceis difficult to reason about analytically and simulation is costly, measurement-based approaches are needed. This thesis describes a new sampling-based technique to collect information about the path a packet takes and congestion it encounters. Experiments with simulations show that this strategy can distinguish problems with an application's communication patterns, its mapping onto a parallel system, and outside interference. We describe a variant of this scheme that requires only 5-6 bits of information in a monitored packet, making it practical for use in next-generation networks.

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Section: Contentsmentioning

confidence: 99%

Understanding congestion in high performance interconnection networks using sampling

Taffet

Mellor-Crummey

2019

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

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“…Existing work most closely related to our work includes [42], [32], [34], and [27]. Wolfe et al use simulations to study the impact of multiple rails and planes on communication-only traces of miniapplications [42].…”

Section: Related Workmentioning

confidence: 99%

“…As a result, it is imperative to develop prediction methodologies that can assist in evaluating the performance of applications and multi-job workloads on available network alternatives. For typical HPC data centers, a signicant fraction of system time is spent in running a few production applications (each using 5-30% of total nodes in the system [32]). us, in this paper, we focus on predicting the impact of alternative fat-tree congurations on a set of such representative applications and libraries.…”

Section: Introductionmentioning

confidence: 99%

Predicting the performance impact of different fat-tree configurations

Jain

Bhatelé

Howell

et al. 2017

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

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e fat-tree topology is one of the most commonly used network topologies in HPC systems. Vendors support several options that can be congured when deploying fat-tree networks on production systems, such as link bandwidth, number of rails, number of planes, and tapering. is paper showcases the use of simulations to compare the impact of these design options on representative production HPC applications, libraries, and multi-job workloads. We present advances in the TraceR-CODES simulation framework that enable this analysis and evaluate its prediction accuracy against experiments on a production fat-tree network. In order to understand the impact of dierent network congurations on various anticipated scenarios, we study workloads with dierent communication paerns, computation-to-communication ratios, and scaling characteristics. Using multi-job workloads, we also study the impact of inter-job interference on performance and compare the cost-performance tradeos.

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“…Other studies have considered either tapered fat trees directly [6] or examined cabling configurations and system performance in hierachical (dragonfly) networks [56], [57]. Rather than placing tasks, other studies have examined how bandwidth steering via optical switches can improve performance in hierarchical networks [32], [58].…”

Section: Related Workmentioning

confidence: 99%

“…Tapered hierarchical networks have been proposed to decrease procurement and power cost [6]. In particular, higher levels in system-wide networks often require expensive optical cables.…”

Section: Introductionmentioning

confidence: 99%

APHiD: Hierarchical Task Placement to Enable a Tapered Fat Tree Topology for Lower Power and Cost in HPC Networks

Ibrahim

Shalf

Wilke

et al. 2017

2017 17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID)

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Abstract-The power and procurement cost of bandwidth in system-wide networks has forced a steady drop in the byte/flop ratio. This trend of computation becoming faster relative to the network is expected to hold. In this paper, we explore how cost-oriented task placement enables reducing the cost of system-wide networks by enabling high performance even on tapered topologies where more bandwidth is provisioned at lower levels. We describe APHiD, an efficient hierarchical placement algorithm that uses new techniques to improve the quality of heuristic solutions and reduces the demand on high-level, expensive bandwidth in hierarchical topologies. We apply APHiD to a tapered fat-tree, demonstrating that APHiD maintains application scalability even for severely tapered network configurations. Using simulation, we show that for tapered networks APHiD improves performance by more than 50% over random placement and even 15% in some cases over costlier, state-of-the-art placement algorithms.

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Characterizing Parallel Scientific Applications on Commodity Clusters: An Empirical Study of a Tapered Fat-Tree

Cited by 14 publications

References 20 publications

Understanding congestion in high performance interconnection networks using sampling

Understanding congestion in high performance interconnection networks using sampling

Predicting the performance impact of different fat-tree configurations

APHiD: Hierarchical Task Placement to Enable a Tapered Fat Tree Topology for Lower Power and Cost in HPC Networks

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