The effect of phosphorus inclusion on different bias stress at high electric field on phosphorus doped SiO 2 is investigated by electrical measurements of SiC MOS capacitors. 1 MHz C − V measurements with (1) different bias hold time (up to 999 s at room and high temperature of 250 • C), (2) different applied gate voltage (± 10, 20 and 30 V without stress time) and (3) different bias hold time at high voltage (± 30 V) were taken to observe the evolution of flatband voltage, effective oxide charge density and interface state density. In this investigation, the characteristics were measured in both sweep directions and compared to those obtained from undoped SiO 2 samples. At 250 • C, the flatband voltage of phosphorus-doped SiO 2 samples shows a significant shift to the positive with increasing bias hold time. Similar trends are observed with the characteristics obtained at room temperature, but the shifts are less significant. Both undoped and phosphorus-doped samples show positive flatband shift when a higher bias was applied for longer hold times, but the latter demonstrated more significant changes. We conclude that the phosphorus ions increase the instability of the electrical characteristics related to the generation of mobile charges in the SiO 2 , resulting in the injection of electrons from the semiconductor to the oxide. Therefore, the accumulated negative charge in phosphorus-doped SiO 2 resulting from the injection of electrons, which is enhanced by the mobile charge, is responsible for the enhanced positive shift in C − V and I − V characteristics.