Charge Transport Mechanism of Stress Induced Leakage Current in Thermal Silicon Oxide

Islamov, Damir R.; Gritsenko, V. A.; Перевалов, Т. В.; Орлов, О. М.; Krasnikov, Gennady Ja.

doi:10.1149/07505.0057ecst

Cited by 3 publications

(3 citation statements)

References 14 publications

(26 reference statements)

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“…[ 16 ] Calculating the slope and intercept of the

ln (I) V

variations (shown in Figure 3c) allows identification of the barrier height (

φ_{bo}

) and ideality factor ( n ) through the substitution of the Richardson constant (

A^{*} = 120 m^{*}; m^{*} = (m_{h - CdBr 2}^{*^{- 1}} + m_{e - SiO 2}^{*^{- 1}})

, the measurement temperature (

T = 300 K

), and substitution of the diode area (

A = 0.0314 {cm}^{- 2}

). The effective masses of electrons in SiO 2 and holes in CdBr 2 were assumed to be

0.50 m_{o}

[ 22 ] and

0.44 m_{o}

, [ 23 ] respectively. No data are available about the hole effective mass in CdBr 2 .…”

Section: Resultsmentioning

confidence: 99%

Au/CdBr₂/SiO₂/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

Qasrawi

Hamarsheh

2021

Physica Status Solidi (a)

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Herein, SiO2 nanosheets with thicknesses of 25−100 nm are used to enhance the performance of Au/CdBr2 Schottky barriers. The Au/CdBr2/SiO2/Au straddling‐type heterojunction devices are prepared by the thermal evaporation technique. It is observed that SiO2 layers enhance the crystallinity of CdBr2 through increasing the crystallite sizes and decreasing the defect density, stacking faults, and microstrain by 50%, 56%, 32%, and 34%, respectively. A work function of 6.38 eV is determined from the temperature‐dependent electrical resistivity measurements of p − type CdBr2. In addition, it is observed that, when coated with 50 nm‐thick SiO2, the Au/CdBr2/SiO2/Au straddling‐type transistors can reveal high current rectification ratios of 6.9 × 102 at low biasing voltages in the range of 0.06−0.30 V. The alternating current signals’ analysis in the microwave range of spectra indicates that the current conduction mechanism is dominated by the correlated barrier hopping and quantum mechanical tunneling. It is observed that the Au/CdBr2/SiO2/Au devices exhibit a negative effect accompanied with resonance−antiresonance in the capacitance spectra. Moreover, the microwave cutoff frequency which reaches ≈165.1 GHz and the magnitude of reflection coefficient spectra show that the device under study can perform as multiband pass/stop filters suitable for wire/wireless communication applications including 3G/4G technologies.

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“…[ 16 ] Calculating the slope and intercept of the

ln (I) V

variations (shown in Figure 3c) allows identification of the barrier height (

φ_{bo}

) and ideality factor ( n ) through the substitution of the Richardson constant (

A^{*} = 120 m^{*}; m^{*} = (m_{h - CdBr 2}^{*^{- 1}} + m_{e - SiO 2}^{*^{- 1}})

, the measurement temperature (

T = 300 K

), and substitution of the diode area (

A = 0.0314 {cm}^{- 2}

). The effective masses of electrons in SiO 2 and holes in CdBr 2 were assumed to be

0.50 m_{o}

[ 22 ] and

0.44 m_{o}

, [ 23 ] respectively. No data are available about the hole effective mass in CdBr 2 .…”

Section: Resultsmentioning

confidence: 99%

Au/CdBr₂/SiO₂/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

Qasrawi

Hamarsheh

2021

Physica Status Solidi (a)

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“…The drift of the device threshold voltage is due to the increase in oxide traps and interface traps, whereas the increase in the gate current is also related to the increase in oxide traps and interface traps. This means that the SILC degradation represents the accumulation of oxide traps and interface traps on the device gate oxide [17], which can be used to characterize the reliability degradation of the device gate oxide layer. resents the slope of the fitted curve in the bilogarithmic coordinates, and the slope of the curve in the bilogarithmic coordinates is approximately 0.38, that is α = 0.38.…”

Section: Threshold Voltage Degradation and Silc Degradation In Relati...mentioning

confidence: 99%

“…The drift of the device threshold voltage is due to the increase in oxide traps and interface traps, whereas the increase in the gate current is also related to the increase in oxide traps and interface traps. This means that the SILC degradation represents the accumulation of oxide traps and interface traps on the device gate oxide [17], which can be used to characterize the reliability degradation of the device gate oxide layer. The drift of the device threshold voltage is due to the increase in oxide traps and interface traps, whereas the increase in the gate current is also related to the increase in oxide traps and interface traps.…”

Section: Threshold Voltage Degradation and Silc Degradation In Relati...mentioning

confidence: 99%

An Investigation of SILC Degradation under Constant Voltage Stress in PDSOI Devices

Liu

2023

Micromachines

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The stress-induced leakage current (SILC) degradation of partially depleted silicon in insulator (PDSOI) devices under constant voltage stress (CVS) was studied. Firstly, the behaviors of threshold voltage degradation and SILC degradation of H-gate PDSOI devices under constant voltage stress were studied. It was found that both the threshold voltage degradation and SILC degradation of the device are power functions of the stress time, and the linear behavior between SILC degradation and threshold voltage degradation is good. Secondly, the soft breakdown characteristics of the PDSOI devices were studied under CVS. Thirdly, the effects of different gate stresses and different channel lengths on the threshold voltage degradation and SILC degradation of the device were studied. The results showed SILC degradation of the device under positive CVS and SILC degradation of the device under negative CVS. The shorter the channel length of the device was, the greater the SILC degradation of the device was. Finally, the influence of the floating effect on the SILC degradation of the PDSOI devices was studied, and the experimental results showed that the degree of SILC degradation of the floating device was greater than that of the H-type grid body contact PDSOI device. This showed that the floating body effect can exacerbate the SILC degradation of PDSOI devices.

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Physical chemistry of the TiN/Hf0.5Zr0.5O2 interface

Hamouda

Pancotti

Lubin

et al. 2020

Journal of Applied Physics

125

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Ferroelectric hafnia-based thin films are promising candidates for emerging high-density embedded nonvolatile memory technologies, thanks to their compatibility with silicon technology and the possibility of 3D integration. The electrode–ferroelectric interface and the crystallization annealing temperature may play an important role in such memory cells. The top interface in a TiN/Hf0.5Zr0.5O2/TiN metal–ferroelectric–metal stack annealed at different temperatures was investigated with X-ray photoelectron spectroscopy. The uniformity and continuity of the 2 nm TiN top electrode was verified by photoemission electron microscopy and conductive atomic force microscopy. Partial oxidation of the electrode at the interface is identified. Hf is reduced near the top interface due to oxygen scavenging by the top electrode. The oxygen vacancy (VO) profile showed a maximum at the top interface (0.71%) and a sharp decrease into the film, giving rise to an internal field. Annealing at higher temperatures did not affect the VO concentration at the top interface but causes the generation of additional VO in the film, leading to a decrease of the Schottky Barrier Height for electrons. The interface chemistry and n-type film doping are believed to be at the origin of several phenomena, including wake-up, imprint, and fatigue. Our results give insights into the physical chemistry of the top interface with the accumulation of defective charges acting as electronic traps, causing a local imprint effect. This may explain the wake-up behavior as well and also can be a possible reason of the weaker endurance observed in these systems when increasing the annealing temperature.

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Charge Transport Mechanism of Stress Induced Leakage Current in Thermal Silicon Oxide

Cited by 3 publications

References 14 publications

Au/CdBr₂/SiO₂/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

Au/CdBr₂/SiO₂/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

An Investigation of SILC Degradation under Constant Voltage Stress in PDSOI Devices

Physical chemistry of the TiN/Hf0.5Zr0.5O2 interface

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Charge Transport Mechanism of Stress Induced Leakage Current in Thermal Silicon Oxide

Cited by 3 publications

References 14 publications

Au/CdBr2/SiO2/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

Au/CdBr2/SiO2/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

An Investigation of SILC Degradation under Constant Voltage Stress in PDSOI Devices

Physical chemistry of the TiN/Hf0.5Zr0.5O2 interface

Contact Info

Product

Resources

About

Au/CdBr₂/SiO₂/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers

Au/CdBr₂/SiO₂/Au Straddling‐Type Heterojunctions Designed as Microwave Multiband Pass Filters, Negative Capacitance Transistors, and Current Rectifiers