Charging Phenomena During Medium Current Ion Implantation of Carbonized Photo-Resist Surface Layers

Shibata, Satoshi; Kamiyanagi, H.; Kawase, Fumitoshi; Kaneki, R.; Kawashima, Takahiro; Kitamura, Akira

doi:10.1109/tsm.2011.2128352

Cited by 2 publications

(3 citation statements)

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“…It measures silicon wafer surface voltage using a non-contact voltage probe. The approach has been adopted for plasma etch [1][2][3], ion implant [4,5], and wet etch process monitoring [6]. Localized charging of the silicon wafer by unbalanced plasma, or ion beam can lead to localized melting due to arcing, antenna damage to gate dielectric, or subsequent particle contamination, just to name a few.…”

Section: Introductionmentioning

confidence: 99%

New Approach to Surface Voltage Based Non-Visual Defect Inspection

et al. 2014

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Measurement speed and resolution of surface voltage based non-visual defect inspection are examined. There is a tradeoff between high measurement speed in whole wafer inspection which requires a larger measurement probe and resolution of the method which requires a smaller measurement probe. In this paper we overcome this tradeoff by using different diameter Kelvin probes. Full wafer inspection is performed using a 2mm diameter Kelvin probe enabling high throughput. Only when a suspected failure is detected, an inspection of a localized smaller area is performed with a 10 μm diameter Kelvin probe.

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Section: Introductionmentioning

confidence: 99%

New Approach to Surface Voltage Based Non-Visual Defect Inspection

et al. 2014

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“…The approach has been very successful in monitoring of plasma etch damage [1][2][3] and was also applied to ion implant, 4,5 and wet etch process monitoring. 6 Localized charging of the silicon wafer by unbalanced plasma or an ion beam can lead to localized melting due to arcing.…”

mentioning

confidence: 99%

“…Wafer inspection based on surface voltage mapping is used in silicon IC processing for detection of a broad category of defects that are revealed on the surface as localized regions with different values of surface potential. The approach has been very successful in monitoring of plasma etch damage [1][2][3] and was also applied to ion implant, 4,5 and wet etch process monitoring. 6 Localized charging of the silicon wafer by unbalanced plasma or an ion beam can lead to localized melting due to arcing.…”

mentioning

confidence: 99%

Non-Visual Defect Monitoring with Surface Voltage Mapping

Findlay¹,

Marinskiy²,

Edelman³

et al. 2015

ECS J. Solid State Sci. Technol.

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Non-Visual Defects (NVD) is a category of semiconductor material and process induced defects that cause electrical failures, but are not detected with visual wafer inspection tools. This paper gives an overview of our non-contact electrical NVD metrology that uses fast whole wafer inspection with standard mm resolution Kelvin probe surface voltage mapping. In an advanced approach detected NVDs are mapped in high resolution (μm range) using Force Kelvin Probe Microscopy. In depth NVD characterization is done with the corona-Kelvin method that quantifies dielectric and interfacial properties in the defect site. This characterization is performed in a non-invasive fluence range of corona charging and all measurements are non-contact, and do not require fabrication of test devices. Wafer inspection based on surface voltage mapping is used in silicon IC processing for detection of a broad category of defects that are revealed on the surface as localized regions with different values of surface potential. The approach has been very successful in monitoring of plasma etch damage [1][2][3] and was also applied to ion implant, 4,5 and wet etch process monitoring. 6 Localized charging of the silicon wafer by unbalanced plasma or an ion beam can lead to localized melting due to arcing. In less extreme cases, charging can cause antenna damage to the gate dielectric. It can also attract particles increasing surface contamination.The root cause of these electrical defects is the charging of the surface by a process that is not detected by optical based inspection tools. When the failure occurs it is not easy to troubleshoot the problem since at a later stage only the consequence of charging, but not the charging itself, is being detected. In addition to surface charge, there are other process related defects not revealed by optical inspection.In 2009 ISMI has defined non-visual defects (NVD) as a novel category of defects (novel in their classification) that cause electrical failures but do not leave behind a physical remnant that can be affordably detected with visual wafer inspection tools.7 Common NVDs also include surface metal contaminants (Cu, Fe); alkali metals (ions Na + ); and gate metal effective work function defects. In this overview we include historically important examples of surface voltage mapping, dating back to mid 1990's. Significant refinement of the technique and the improvement of map resolution and measurement speed have only recently been introduced, using multiple Kelvin probes in a novel generation of surface voltage mapping, SVM tools. 8 The corresponding most recent application examples include monitoring of defects in Si patterned wafers and high resolution intra-die mapping with microKelvin Force Probe.8 Finally, we discuss extension of the technique to epitaxial SiC layers and we compare surface voltage mapping of defects with mapping of lifetime degrading defects.9,10 The corresponding SiC results illustrate three stages of our metrology: 1-whole wafer defect mapping; 2-defect identification w...

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Charging Phenomena During Medium Current Ion Implantation of Carbonized Photo-Resist Surface Layers

Cited by 2 publications

References 11 publications

New Approach to Surface Voltage Based Non-Visual Defect Inspection

New Approach to Surface Voltage Based Non-Visual Defect Inspection

Non-Visual Defect Monitoring with Surface Voltage Mapping

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