Totally self-checking circuits in computer systems detect errors on line during normal operation. The types of errors covered include those due to permanent, transient, and intermittent faults. In a TSC design, the circuit detects errors by monitoring redundantly coded data/control paths through a TSC checker. A problem arises when not all these code words are on the monitored lines during normal operation. The authors propose a method of designing checkers that solves this difficulty by using TSC checkers based on flip-flops instead of using the mostly combinational checkers available now.A digital system consists of logic components that can fail during normal operation. After a system fails, engineers must identify any faulty components and replace them. The identification, I or diagnosis, of the error can take a long time and can interrupt service. In many applications, such as telephone-switching systems and satellite-guiding systems, these interruptions are unacceptable or at best costly. Also, if the fault is not located quickly, it can corrupt much valuable data.An ideal solution to dealing with faulty systems is to be able to rapidly identify a fault and have a backup system take over. The backup system initiates some mechanism that rolls back operation to recover from error and then instructs the system to resume operation from that point. The faulty unit then flags itself a s a source of trouble. To implement this solution at the macro level, we would use combinational circuits that are sev-checking. That is, each circuit performs its function and flags any fault in itself in a way that we can observe.