Checking Data-Race Freedom of GPU Kernels, Compositionally

Abstract

GPUs offer parallelism as a commodity, but they are difficult to program correctly. Static analyzers that guarantee data-race freedom (DRF) are essential to help programmers establish the correctness of their programs (kernels). However, existing approaches produce too many false alarms and struggle to handle larger programs. To address these limitations we formalize a novel compositional analysis for DRF, based on access memory protocols. These protocols are behavioral types that codify the way threads interact over shared memory.Our work includes fully mechanized proofs of our theoretical results, the first mechanized proofs in the field of DRF analysis for GPU kernels. Our theory is implemented in , a tool that outperforms the state-of-the-art. Notably, it can correctly verify at least $$1.42{\times }$$ 1.42 × more real-world kernels, and it exhibits a linear growth in 4 out of 5 experiments, while others grow exponentially in all 5 experiments.

Provable GPU Data-Races in Static Race Detection

“…MAPs act as an over-approximation of the behavior of CUDA program. In [2] we have shown that it is possible to verify whether or not MAPs are DRF using a transformation to Satisfiability Modulo Theories (SMT).…”

“…Over the last decade, several authors proposed static approaches to verify data-race freedom (DRF) of GPU kernels [1,2,9]. While these techniques guarantee the absence of bugs, they may report false alarms.…”

“…Our approach is to extend the theory behind Faial [2], a static DRF analysis tool, so that alarms can be identified as true alarms, i.e., provable data-races. Faial centers its verification around an abstraction called memory access protocols (MAP): a form of behavioral types that expresses where data is written to (resp.…”

“…Faial leverages the fact that MAP does not represent the array's data to improve the performance of the DRF analysis. The goal of this paper is to introduce a type system that identifies kernels for which the DRF analysis in [2] is sound and complete.…”

“…Our characterization takes the form of a syntax-directed typing system whereby when a BabyCUDA program is assigned a memory access protocol, then this protocol reflects and preserves the behavior of its kernel. We note that [2] studies formally the verification of MAPs, but it only informally presents the inference step from CUDA programs to MAPs. This paper addresses that concern via BabyCUDA, as our overarching goal is to mechanize the entire Faial tool-chain.…”