Checking Opacity and Durable Opacity with FDR

Dongol, Brijesh; Le-Papin, Jay

doi:10.1007/978-3-030-92124-8_13

Cited by 3 publications

References 34 publications

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Intel PMDK Transactions: Specification, Validation and Concurrency

Raad,

Lahav,

Wickerson

et al. 2024

Lecture Notes in Computer Science

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Software Transactional Memory (STM) is an extensively studied paradigm that provides an easy-to-use mechanism for thread safety and concurrency control. With the recent advent of byte-addressable persistent memory, a natural question to ask is whether STM systems can be adapted to support failure atomicity. In this paper, we answer this question by showing how STM can be easily integrated with Intel’s Persistent Memory Development Kit (PMDK) transactional library (which we refer to as txPMDK) to obtain STM systems that are both concurrent and persistent. We demonstrate this approach using known STM systems, TML and NOrec, which when combined with txPMDK result in persistent STM systems, referred to as PMDK-TML and PMDK-NORec, respectively. However, it turns out that existing correctness criteria are insufficient for specifying the behaviour of txPMDK and our concurrent extensions. We therefore develop a new correctness criterion, dynamic durable opacity, that extends the previously defined notion of durable opacity with dynamic memory allocation. We provide a model of txPMDK, then show that this model satisfies dynamic durable opacity. Moreover, dynamic durable opacity supports concurrent transactions, thus we also use it to show correctness of both PMDK-TML and PMDK-NORec.

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Intel PMDK Transactions: Specification, Validation and Concurrency

Raad,

Lahav,

Wickerson

et al. 2024

Lecture Notes in Computer Science

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Artifact Report: Intel PMDK Transactions: Specification, Validation and Concurrency

Raad,

Lahav,

Wickerson

et al. 2024

Lecture Notes in Computer Science

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A verified durable transactional mutex lock for persistent x86-TSO

Vafeiadi Bila,

Dongol

2024

Form Methods Syst Des

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The advent of non-volatile memory technologies has spurred intensive research interest in correctness and programmability. This paper addresses both by developing and verifying a durable (aka persistent) transactional memory (TM) algorithm, $$\text {dTML}_{\text {Px86}}$$ dTML Px86 . Correctness of $$\text {dTML}_{\text {Px86}}$$ dTML Px86 is judged in terms of durable opacity, which ensures both failure atomicity (ensuring memory consistency after a crash) and opacity (ensuring thread safety). We assume a realistic execution model, Px86, which represents Intel’s persistent memory model and extends the Total Store Order memory model with instructions that control persistency. Our TM algorithm, $$\text {dTML}_{\text {Px86}}$$ dTML Px86 , is an adaptation of an existing software transactional mutex lock, but with additional synchronisation mechanisms to cope with Px86. Our correctness proof is operational and comprises two distinct types of proofs: (1) proofs of invariants of $$\text {dTML}_{\text {Px86}}$$ dTML Px86 and (2) a proof of refinement against an operational specification that guarantees durable opacity. To achieve (1), we build on recent Owicki–Gries logics for Px86, and for (2) we use a simulation-based proof technique, which, as far as we are aware, is the first application of simulation-based proofs for Px86 programs. Our entire development has been mechanised in the Isabelle/HOL proof assistant.

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Checking Opacity and Durable Opacity with FDR

Cited by 3 publications

References 34 publications

Intel PMDK Transactions: Specification, Validation and Concurrency

Intel PMDK Transactions: Specification, Validation and Concurrency

Artifact Report: Intel PMDK Transactions: Specification, Validation and Concurrency

A verified durable transactional mutex lock for persistent x86-TSO

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