Chemical mechanical polishing in the dry lubrication regime: Application to conductive polysilicon

The Effect of Slurry Properties on the CMP Removal Rate of Boron Doped Polysilicon

“…Since hydroxyl anion transportation to the wafer surface occurs readily at low doping levels, while mechanical factors are more dominant in the CMP of highly doped silicon wafers. 10 With the increasing pH of the solution in Case 2, a sudden increase in polish rate was observed unlike Case 1. This is attributed to the mechanical interactions at the wafer surface.…”

“…11 Therefore the polish temperature and the friction force are higher than Case 1 as illustrated in Figure 8 and elsewhere. 10 Since silicon etching is an exothermic process, 24,25 by increasing the pH the polish temperature is expected to increase further. However, the slurry can act as the coolant during polishing and for Case 1 with higher flow rate the increase of temperature with pH was not observed.…”

“…Enhancement of polish rate can be achieved by optimizing the polish properties such as pressure, flow rate and velocity, as has been shown in our prior publications. 10,11 Polish rate can also be improved by enhancing the slurry chemistry and by understanding the basic properties of the slurry.Pietsch et al studied the influence of slurry pH and found that the maximum etch and polish rate of single crystal silicon (n-type Si (100) and (111) wafers with 150 cm resistivity) occurs at pH∼11. 8,[12][13][14] They showed that the presence of hydroxyl anions plays a major role in the chemical etching of the polysilicon surface since OH − anions weaken the Si-Si bonds by acting as a strong polarizer.…”

“…Enhancement of polish rate can be achieved by optimizing the polish properties such as pressure, flow rate and velocity, as has been shown in our prior publications. 10,11 Polish rate can also be improved by enhancing the slurry chemistry and by understanding the basic properties of the slurry.…”

Reactive Liquids for Non–Prestonian Chemical Mechanical Polishing of Polysilicon Films

“…[1][2][3][4][5][6] In these examples, large step heights of poly-Si layers (>4-5 μm thick during MEMS device fabrication and ∼1 μm thick during FinFET and RMG integrations) need to be removed while protecting underlying silicon dioxide and/or silicon nitride films. 1,7,8 Several slurries were formulated earlier to selectively polish poly-Si over silicon dioxide and silicon nitride films. Using polyethyleneimine (PEI) as an additive, Lee et al 9 and Kraft et al 10 obtained high poly-Si removal rates (RRs) of ∼500 nm/min and very low silicon dioxide (<2 nm/min) and silicon nitride (<2nm/min) RRs using silica-based and ceria-based slurries, respectively.…”