Chip-Scale Coils for Millimeter-Sized Bio-Implants

Abstract

Next generation implantable neural interfaces are targeting devices with mm-scale form factors that are freely floating and completely wireless. Scalability to more recording (or stimulation) channels will be achieved through distributing multiple devices, instead of the current approach that uses a single centralized implant wired to individual electrodes or arrays. In this way, challenges associated with tethers, micromotion, and reliability of wiring is mitigated. This concept is now being applied to both central and peripheral nervous system interfaces. One key requirement, however, is to maximize specific absorption rate (SAR) constrained achievable wireless power transfer efficiency (PTE) of these inductive links with mm-sized receivers. Chip-scale coil structures for microsystem integration that can provide efficient near-field coupling are investigated. We develop near-optimal geometries for three specific coil structures: in-CMOS, above-CMOS (planar coil post-fabricated on a substrate), and around-CMOS (helical wirewound coil around substrate). We develop analytical and simulation models that have been validated in air and biological tissues by fabrications and experimental measurements. Specifically, we prototype structures that are constrained to a 4 mm 4 mm silicon substrate, i.e., the planar in-/above-CMOS coils have outer diameters 4 mm, whereas the around-CMOS coil has an inner diameter of 4 mm. The in-CMOS and above-CMOS coils have metal film thicknesses of 3- m aluminium and 25- m gold, respectively, whereas the around-CMOS coil is fabricated by winding a 25-m gold bonding wire around the substrate. The measured quality factors (Q) of the mm-scale Rx coils are 10.5 @450.3 MHz (in-CMOS), 24.61 @85 MHz (above-CMOS), and 26.23 @283 MHz (around-CMOS). Also, PTE of 2-coil links based on three types of chip-scale coils is measured in air and tissue environment to demonstrate tissue loss for bio-implants. The SAR-constrained maximum PTE measured (together with resonant frequencies, in tissue) are 1.64% @355.8 MHz (in-CMOS), 2.09% @82.9 MHz (above-CMOS), and 3.05% @318.8 MHz (around-CMOS).

Maximal Q Factor for an On-Chip, Fuse-Based Trimmable Capacitor

“…To illustrate what could happen if care is not taken to ensure a sufficiently high Q factor, consider what would happen if a state-of-the art coil was to be used with the capacitor from the last example to form an LC resonator. Q factors of on-chip coils of 11.05 [2] and 10.5 [3] operating at hundreds of MHz have been demonstrated. Connecting one such coil to a capacitor with a worst-case Q factor of 22.9, as in the example, the worst-case Q factor of the resulting LC circuit would be reduced by over 30 % compared to the original Q factor of the coil.…”

“…Applications for such circuits exist in the field of wireless transfer of power directly to a single-chip system, where the RF inductor is integrated on the die. Examples of applications include implantable chips in humans for biomedical purposes [2,3], and sensors for condition monitoring of power semiconductors, where a wireless power supply and communication interface provides galvanic isolation from the high-voltage power semiconductors [4,5].…”

Towards a Distributed, Chronically-Implantable Neural Interface

“…The underlying justification for this 3-tier approach is to improve the overall wireless power transfer efficiency by more than an order of magnitude (cf. 2-coil mm-scale link [12]). This is accomplished by partitioning the link into a cm-scale transcutaneous link (similar to those used in cochlear implants), and multiple mm-scale transdural links.…”

“…Each probe contains a fully integrated wireless recording system that is capable of power management, signal amplification, and data telemetry. A micro-fabricated receiving coil [12], is incorporated inside the probe micro-package that inductively harvests near-field wireless power around the 433 MHz ISM (industrial, scientific and medical) radio band. This construction relies on a passive intermediate transceiver that focuses the external power source and boosts the overall power transmission efficiency to provide uniform power distribution [13].…”

A Design Technique for Optimizing Resonant Coils and the Energy Transfer of Inductive Links

“…Two coil topologies commonly used in WPT applications are spiral and helical inductors. The planar structure of the spiral coils makes them more suitable for space-confined applications such as IMDs [1], [4], [7], [8] and portable electronic devices [12], [13]. On the other hand, helical coils, due to 0018-9480 © 2020 IEEE.…”