CIC for decimation and interpolation using Xilinx system generator

Elamaran, V.; Vaishnavi, R.; Rozario, A. Maxel; Joseph, Slitta Maria; Cherian, Aylwin

doi:10.1109/iccsp.2013.6577129

Cited by 11 publications

(6 citation statements)

References 6 publications

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“…The interpolated signal is then modulated by mixing it with sine and cosine signals generated by an NCO, at the desired carrier frequency, f c . Utilizing a cascaded integer comb (CIC) filter IP core [13] and a custom IQ mixer, a low resource DUC and DDC mixer are implemented. The CIC filter is a type of FIR filter primarily used for interpolation and decimation with efficient implementation [13].…”

Section: Digital Up-and Downconversionmentioning

confidence: 99%

SoC-based Implementation of a Multipath-Resilient Broadband Underwater OFDM System

Hermans,

Sklivanitis,

Pados

2024

Proceedings of the 10th Convention of the European Acoustics Association Forum Acusticum 2023

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Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier modulation technique where a large number of closely spaced, in frequency, orthogonal subcarriers are transmitted in parallel to form a single wideband signal. With appropriate channel estimation and equalization at the receiver using known sub-carriers called pilots, the receiver can successfully correct for frequency selective fading -a common phenomenon in underwater acoustic channels. In this work, we will present the design and results from experimental evaluation of a high-rate OFDM transceiver that is implemented on a lowsize, weight, power and cost System-on-Chip (SoC) based underwater acoustic modem. We carry out tests with broadband hydrophones with a usable frequency range up to 470 kHz in shallow water environments. The proposed transceiver enables link re-configurability with respect to bandwidth, number of pilot, null and data subcarriers, FFT size, and modulation and test link data rates up to 345 kbps in distances up to 9 m.

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Section: Digital Up-and Downconversionmentioning

confidence: 99%

SoC-based Implementation of a Multipath-Resilient Broadband Underwater OFDM System

Hermans,

Sklivanitis,

Pados

2024

Proceedings of the 10th Convention of the European Acoustics Association Forum Acusticum 2023

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“…The output of the integrator section is latched onto the decimation register by CK_DEC. The HDF decimation rate is fixed by H_DRATE +1, which is named as Hdec control signal [6]. The decimation register output data is fed into the comb filter section.…”

Section: ) Where M-decimation Ratio R-differential Delay N -Number Omentioning

confidence: 99%

Implementation of Dual Stage Multi-rate Filter

R.*,

P.T

2020

IJRTE

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In this work, an effort is made towards the design and implementation of dual stage multi-rate digital filter architecture which is suitable for digital receivers and satellite applications with reduced VLSI cost function. The proposed dual stage decimation filter architecture consists of Higher Order Filter (HDF) as first section. To remove the droops created by the HDF section in the pass band and to get the smooth pass band frequency response characteristics, HDF filter is followed by a Corrector/Compensating Finite Impulse Response (FIR) filter network. The compensating FIR is designed using conventional Multiplier and Accumulator (MAC) unit. Initially, the filter architectures frequency response are obtained as per the given specifications using MATLAB. Then, Field Programmable Gate Array (FPGA) based performance metrics are captured and analyzed with respect to area, dynamic power dissipation, delay and power delay product. Based on the FPGA performance metrics, it is observed that the proposed dual stage filter leads to 22% of area saving and 9.5 % reduction in dynamic power dissipation. Mainly these filters are best suited for Digital Signal Processing applications in wireless receivers.

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“…The LMS filters have been used in FPGAs for active noise cancellation in headphones [639], echo cancellation [640][641][642] and non invasive fetal ECG (Electrocardiogram) [643,644]. Other digital filters implementations in FPGAs include Cascaded integrator-comb (CIC) filter [645][646][647][648][649], Infinite Impulse Response (IIR) filters [650][651][652][653] and matched filter [654][655][656][657][658].…”

Section: Digital Filtersmentioning

confidence: 99%

Field Programmable Gate Array Applications—A Scientometric Review

2019

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Field Programmable Gate Array (FPGA) is a general purpose programmable logic device that can be configured by a customer after manufacturing to perform from a simple logic gate operations to complex systems on chip or even artificial intelligence systems. Scientific publications related to FPGA started in 1992 and, up to now, we found more than 70,000 documents in the two leading scientific databases (Scopus and Clarivative Web of Science). These publications show the vast range of applications based on FPGAs, from the new mechanism that enables the magnetic suspension system for the kilogram redefinition, to the Mars rovers’ navigation systems. This paper reviews the top FPGAs’ applications by a scientometric analysis in ScientoPy, covering publications related to FPGAs from 1992 to 2018. Here we found the top 150 applications that we divided into the following categories: digital control, communication interfaces, networking, computer security, cryptography techniques, machine learning, digital signal processing, image and video processing, big data, computer algorithms and other applications. Also, we present an evolution and trend analysis of the related applications.

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CIC for decimation and interpolation using Xilinx system generator

Cited by 11 publications

References 6 publications

SoC-based Implementation of a Multipath-Resilient Broadband Underwater OFDM System

SoC-based Implementation of a Multipath-Resilient Broadband Underwater OFDM System

Implementation of Dual Stage Multi-rate Filter

Field Programmable Gate Array Applications—A Scientometric Review

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