CIFER: A 12nm, 16mm<sup>2</sup>, 22-Core SoC with a 1541 LUT6/mm<sup>2</sup> 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Chang, Ting-Jung; Li, Ang; Gao, Fei; Ta, Tuan; Tziantzioulis, Georgios; Yu-xiang, OU; Wang, Moyang; Tu, Jinzheng; Xu, Kena; Jackson, Paul J.; Ning, August; Chirkov, Grigory; Orenes-Vera, Marcelo; Agwa, Shady; Yan, Xiaoyu; Tang, Eric; Balkind, Jonathan; Batten, Christopher; Wentzlaff, David

doi:10.1109/cicc57935.2023.10121294

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CIFER: A 12nm, 16mm², 22-Core SoC with a 1541 LUT6/mm² 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Cited by 4 publications

References 0 publications

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Dynamic Resource Management in Reconfigurable SoC for Multi-Tenancy Support

MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems

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CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Cited by 4 publications

References 0 publications

SLMLET: A RISC-V Processor SoC with Tightly-Coupled Area-Efficient eFPGA Blocks

SLMLET: A RISC-V Processor SoC with Tightly-Coupled Area-Efficient eFPGA Blocks

Dynamic Resource Management in Reconfigurable SoC for Multi-Tenancy Support

MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems

Contact Info

Product

Resources

About

CIFER: A 12nm, 16mm², 22-Core SoC with a 1541 LUT6/mm² 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA