Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387)
DOI: 10.1109/sbcci.1999.803098
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Circuit-level considerations for mixed signal programmable components

Abstract: IEEE Design & Test of ComputersIN THE PAST DECADE, researchers have paid significant attention to the design of heterogeneous embedded systems. However, most of their work focused on digital hardware and associated software, 1,2 which remain firmly rooted in an all-digital environment. In contrast, an embedded system must generally interface with the real world. At this level, most signals are continuous time and can assume only analog values. Most sensors (such as those for temperature, pressure, humidity, re… Show more

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Cited by 1 publication
(2 citation statements)
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“…h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [5] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [5] x [4] time time As shown in table 2, the number of logic cells for the adder and the multiplier is 160. With a total of 518 logic cells for the filter with sequencial multiplier, the main conclusion is that the 16 bit multiplexers needed in the data path are the great responsible for the area occupation.…”
Section: Synthesis and Simulation Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [1] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [5] x [4] h[0] h [1] h [2] h [3] x [3] x [2] x [5] x [4] time time As shown in table 2, the number of logic cells for the adder and the multiplier is 160. With a total of 518 logic cells for the filter with sequencial multiplier, the main conclusion is that the 16 bit multiplexers needed in the data path are the great responsible for the area occupation.…”
Section: Synthesis and Simulation Resultsmentioning
confidence: 99%
“…This way, this study checked possible multiplier implementations that could reduce filter area, while still maintaining throughput. Since the non-linear filter will be used in a larger system [1], it is important to verify area requirements, so that the filter and a microprocessor could fit in the same chip. This paper is organized as follows.…”
Section: Introductionmentioning
confidence: 99%