This paper will present the first results from irradiation tests performed on the ALICE TPC Readout Control Unit 2 (RCU2). The RCU2 is developed in order to double the readout speed with respect to the present RCU1, which then will fulfil the requirements for LHC RUN2. While the present RCU1 is based on an SRAM based FPGA, whose configuration memory has shown to be sensitive to single event upsets, the newly released Flash-based Smartfusion2 FPGA from Microsemi has been chosen for the RCU2.