Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks

Kim, Hanjoon; Kim, Yonggon; Kim, John

doi:10.1109/l-ca.2012.22

Cited by 29 publications

(18 citation statements)

References 9 publications

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“…In contrast, all of these previous works use routers with in-ring buffering, wormhole switching and flow control. Concurrent works by Kim et al propose tNoCs, hybrid packet-flit credit-based flow control [27] and Clumsy Flow Control (CFC) [26]. However, these two designs add additional complexity because tNoCs [27] requires an additional credit network to guarantee forward progress while CFC requires coordination between cores and memory controllers.…”

Section: E Comparison Against Other Ring Configurationsmentioning

confidence: 99%

“…In contrast, flow control in HiRD is lightweight (with deflection based flow control, the Retransmit-Once mechanism, and simpler local-to-global and global-to-local buffers). Additionally, throttling decisions in HiRD can be made locally in each local ring as opposed to global decisions in CFC [26] and tNoCs [27].…”

Section: E Comparison Against Other Ring Configurationsmentioning

confidence: 99%

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Design and Evaluation of Hierarchical Rings with Deflection Routing

Ausavarungnirun

Fallin

et al. 2014

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing

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Abstract-Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice some of the key benefits of rings by reintroducing more complex in-ring buffering and buffered flow control. Our goal in this paper is to design a new hierarchical ring interconnect that can maintain most of the simplicity of traditional ring designs (i.e., no in-ring buffering or buffered flow control) while achieving high scalability as more complex buffered hierarchical ring designs.To this end, we revisit the concept of a hierarchical-ring networkon-chip. Our design, called HiRD (Hierarchical Rings with Deflection), includes critical features that enable us to mostly maintain the simplicity of traditional simple ring topologies while providing higher energy efficiency and scalability. First, HiRD does not have any buffering or buffered flow control within individual rings, and requires only a small amount of buffering between the ring hierarchy levels. When inter-ring buffers are full, our design simply deflects flits so that they circle the ring and try again, which eliminates the need for in-ring buffering. Second, we introduce two simple mechanisms that together provide an end-to-end delivery guarantee within the entire network (despite any deflections that occur) without impacting the critical path or latency of the vast majority of network traffic.Our experimental evaluations on a wide variety of multiprogrammed and multithreaded workloads and synthetic traffic patterns show that HiRD attains equal or better performance at better energy efficiency than multiple versions of both a previous hierarchical ring design and a traditional single ring design. We also extensively analyze our design's characteristics and injection and delivery guarantees. We conclude that HiRD can be a compelling design point that allows higher energy efficiency and scalability while retaining the simplicity and appeal of conventional ring-based designs.

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Section: E Comparison Against Other Ring Configurationsmentioning

confidence: 99%

Section: E Comparison Against Other Ring Configurationsmentioning

confidence: 99%

Design and Evaluation of Hierarchical Rings with Deflection Routing

Ausavarungnirun

Fallin

et al. 2014

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing

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“…It remains to be seen if PQS can be extended to provide QoS support. Source throttling [52,19] has been proposed to prevent buffer congestion but these have been proposed on top of conventional, buffered flow control or bufferless networks. Grot et al [13] also proposed a hybrid flow control in their kilo-NoC but their hybrid flow control combined elastic-buffered flow control with minimal VC flow control.…”

Section: Related Workmentioning

confidence: 99%

Transportation-network-inspired network-on-chip

Kim

Maeng

et al. 2014

2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)

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A cost-efficient network-on-chip is needed in a scalable many-core systems. Recent multicore processors have leveraged a ring topology and hierarchical ring can increase scalability but presents different challenges, including higher hop count and global ring bottleneck. In this work, we describe a hierarchical ring topology that we refer to as a transportationnetwork-inspired network-on-chip (tNoC) that leverages principles from transportation network systems. In particular, we propose a novel hybrid flow control for hierarchical ring topology to scale the topology efficiently. The flow control is hybrid in that the channels are allocated on flit granularity while the buffers are allocated on packet granularity. The hybrid flow control enables a simplified router microarchitecture (to minimize per-hop latency) as router input buffers are minimized and buffers are pushed to the edges, either at the output ports or at the hub routers that interconnect the local rings to the global ring -while still supporting virtual channels to avoid protocol deadlock. We also describe a packet-quota-system (PQS) and a separate credit network that provide congestion management, support prioritized arbitration in the network, and provide support for multiflit packets. A detailed evaluation of a 64-core CMP shows that the tNoC improves performance by up to 21% compared with a baseline, buffered hierarchical ring topology while reducing NoC energy by 51%.

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“…Previous work [1,[20][21][22] uses source throttling, or constraining applications' network request rates, to reduce deflection rates and improve overall system throughput. Nychis et al [1] propose the BLESS-Throttling (BLESS-T) algorithm to mitigate congestion by limiting traffic from NoC-insensitive applications.…”

Section: Bufferless Nocsmentioning

confidence: 99%

“…Ausavarungnirun et al [20] propose an application-aware mechanism, Adaptive Cluster Throttling (ACT), to improve throughput and fairness by throttling clusters of application. Kim et al [21] propose Clumsy Flow Control (CFC) to degrade network congestion by implementing credit-based flow control in bufferless NoCs.…”

Section: Bufferless Nocsmentioning

confidence: 99%

QBLESS: A case for QoS-aware bufferless NoCs

Yao

Sui²,

et al. 2014

2014 IEEE 22nd International Symposium of Quality of Service (IWQoS)

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Datacenters consolidate diverse applications to improve utilization. However when multiple applications are colocated on such platforms, contention for shared resources like Networks-on-Chip (NoCs) can degrade the performance of latency-critical online services (high-priority applications). Recently proposed bufferless NoCs have the advantages of requiring less area and power, but they pose challenges in quality-of-service (QoS) support, which usually relies on bufferbased virtual channels (VCs). We propose QBLESS, a QoSaware bufferless NoC scheme for datacenters. QBLESS consists of two components: a routing mechanism (QBLESS-R) that can substantially reduce flit deflection for high-priority applications, and a congestion-control mechanism (QBLESS-CC) that guarantees performance for high-priority applications and improves overall system throughput. We use trace-driven simulation to model a 64-core system, finding that when compared to BLESS, a previous state-of-the-art bufferless NoC design, QBLESS improves performance of high-priority applications by an average of 33.2%.

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Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks

Cited by 29 publications

References 9 publications

Design and Evaluation of Hierarchical Rings with Deflection Routing

Design and Evaluation of Hierarchical Rings with Deflection Routing

Transportation-network-inspired network-on-chip

QBLESS: A case for QoS-aware bufferless NoCs

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