CMOS design of the power and modulation stage for a light emitting capacitor (LEC)

Coy, Fausto Orozco; Díaz-Méndez, Alejandro; Aceves-Mijares, M.; Diaz, Victor R. Gonzalez

doi:10.1109/iceee.2019.8884559

Cited by 1 publication

(1 citation statement)

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“…To design a voltage booster, it is necessary to determine the minimum breakdown voltage value for the different breakdown mechanisms of the devices inherent to the manufacturing process. In [19], different breakdown mechanisms were measured, and it was found that the lowest breakdown voltage is around 20 V. At 15 V, the power consumption varies from 1.5 W to 3.5 W for square LECs with areas ranging from 0.25 mm 2 to 4 mm 2, according to Fig. 7.…”

Section: Simulation Resultsmentioning

confidence: 99%

Verilog-A Modeling of an Electrophotonic Emitter-Waveguide-Detector (EWD) System Compatible with Standard CMOS Technology

Orozco Coy,

Gonzalez-Diaz,

Aceves-Mijares

et al. 2024

IEEE Latin Am. Trans.

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Lab-On-A-Chip (LOC) devices that utilize lightbased detection principles offer advantages compared with their electronic counterparts, such as higher sensitivity and not necessarily needing markers, simplifying their use, and reducing reagent consumption. Recently, the development of Si-based light emitters compatible with standard CMOS manufacturing processes has overcome one of the main obstacles in creating fully integrated electrophotonic systems on the same substrate. This groundbreaking achievement means the possibility of integrating photonic and driving circuitry in the same chip. However, due to its extreme novelty and specific electronic requirements, new design solutions must be tailored to further aid fulfilling the promise of a fully integrated electrophotonic system. The lack of existing circuit design models and tools hinders the advancement of this technology. To aid further in designing these systems, this article presents the development of a Verilog-A macromodel for an electrophotonic circuit composed of a Light Emitting Capacitor (LEC), a waveguide, and a sensor. The system was simulated in the Cadence Virtuoso environment, and a use case exhibits the system simulation including a CMOS circuit for emitter excitation and sensor reading.

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Section: Simulation Resultsmentioning

confidence: 99%