20th Annual IEEE Power Electronics Specialists Conference
DOI: 10.1109/pesc.1989.48467
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CMOS drive and control circuitry for 1-10 MHz power conversion

Abstract: T h e design, iniplementation and experimental evaluation of CMOS sub-circuits t h a t can be combined t o implement integrated control a n d drive for 1-10 MHs power circuits are presented. T h e ability of CMOS to satisfactorily perform a t these high frequencies is documented.

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Cited by 3 publications
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“…Pg, = EgofsWj, (9) where E is the total gate-drive energy consumed in a single low-high-low gate transition cycle. Using an algebraic minimization [9], the optimal gate width of M j , g!…”
Section: Fet Designmentioning
confidence: 99%
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“…Pg, = EgofsWj, (9) where E is the total gate-drive energy consumed in a single low-high-low gate transition cycle. Using an algebraic minimization [9], the optimal gate width of M j , g!…”
Section: Fet Designmentioning
confidence: 99%
“…Using an algebraic minimization [9], the optimal gate width of M j , g! is found to give equal conduction loss and gate-drive loss, where:…”
Section: Fet Designmentioning
confidence: 99%
See 1 more Smart Citation