CMOS wireless phase-shifted transmitter

Hamedi-Hagh, Sotoudeh; Salama, C.A.T.

doi:10.1109/jssc.2004.831786

Cited by 35 publications

(13 citation statements)

References 29 publications

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“…The two constant amplitude signals are separately amplified by two PAs and then recombined in a power combiner, where the quadrature signals cancel each other as long as the power combiner is linear and the two amplifier paths well balanced. Common ways to realize the power combiner are using a matched combiner with isolation [58] which suffers from low efficiency unless the power is recycled [59], on-chip [60]- [62] or off-chip [63] λ/4 transmission lines, or connecting the load directly between the two amplifier outputs using a transformer [64].…”

Section: B Pa Classes and Architectures For High Output Powermentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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Abstract-This paper reviews the design of watt-level integrated CMOS RF power amplifiers (PAs) and state-of-the-art results in the literature. To reach watt-level output power from a single-chip CMOS PA, two main strategies can be identified: use of high supply voltage, and use of matching and power combination. High supply voltage limits are closely related to device design in the fabrication process. However, the maximum operating voltage can be improved by amplifier class selection, circuit solutions, and process modifications or mask changes. High output power can also be reached by the use of on-chip matching and power combination, commonly using on-chip transformers. Reliability often sets the limits for the PA design, and PA degradation mechanisms are reviewed. A compilation of state-of-the-art published results for linear and switched wattlevel PAs, as well as a few fully integrated CMOS PAs, is presented and discussed.

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Section: B Pa Classes and Architectures For High Output Powermentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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“…Fig. 2(b) shows a block diagram of the transmitter in which, s(t) is fed to a 90-degree phase-shifting network followed by a variable gain amplifier (VGA) [12][13]. With proper gain control, the output of the VGA will be an estimate of e(t).…”

Section: Conventional Scs Techniquesmentioning

confidence: 99%

A CMOS Outphasing Transmitter Using Two Wideband Phase Modulators

Lee¹,

Kım²,

Song³

et al. 2011

JSTS:Journal of Semiconductor Technology and Science

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Abstract-This paper describes a CMOS outphasing transmitter using two wideband phase modulators. The proposed architecture can simplify the overall outphasing transmitter architecture using two-point phase modulation in phase-locked loop, which eliminates the necessity digital-to-analog converters, filters, and mixers. This architecture is verified with a WCDMA signal at 1.65 GHz. The prototype is fabricated in standard 130 nm CMOS technology. The measurement results satisfied the spectrum mask and 4.9% EVM performance.

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“…Cascades of N segments of low-pass filters in a p-configuration can be used to replace a transmission line with quarter wavelength (k/4) at frequency f c and characteristic impedance Z 0 by using inductors and capacitances with values as follows [10,11]:…”

Section: Phase Shiftermentioning

confidence: 99%

A multimode, power-adjustable transmitter for UHF mobile RFID reader

Yang

Wang

2010

Analog Integr Circ Sig Process

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Aiming at the expansive application of RFID technology, design considerations are expatiated to a highly-integrated, multimode, power-adjustable transmitter in mobile UHF RFID reader with CMOS process. The transmitter consists of digital, baseband and RF sections, including an up-conversion mixer and a gain-variable power amplifier (PA). Multiple data modes can be generated in digital section. The direct-conversion RF section is proposed to minimize the off-chip components and provide a low-cost, highly efficient solution. The highlight of the paper is the PA can achieve a maximum output power of 26 dBm and maintain a power-added efficiency (PAE) higher than 40% over the 18-26 dBm power range. Feasibility of the transmitter is validated by ADS simulator.

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CMOS wireless phase-shifted transmitter

Cited by 35 publications

References 29 publications

A Review of Watt-Level CMOS RF Power Amplifiers

A Review of Watt-Level CMOS RF Power Amplifiers

A CMOS Outphasing Transmitter Using Two Wideband Phase Modulators

A multimode, power-adjustable transmitter for UHF mobile RFID reader

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