Cold electronics: an overview

Kirschman, Randall

doi:10.1016/0011-2275(85)90036-0

Cited by 118 publications

(31 citation statements)

References 48 publications

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“…Low temperature operation of CMOS devices and circuits has been actively studied for both space and commercial applications for the past thirty years [1] [2] [3]. Reducing the temperature can lead to potentially greater benefits in terms of device and circuit performance.…”

Section: Introductionmentioning

confidence: 99%

New understanding of LDD CMOS hot-carrier degradation and device lifetime at cryogenic temperatures

Wang-Ratkovic

Lacoe

MacWilliams

et al.

1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual

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This work shows that the worst-case gate voltage stress condition for LDD nMOSFETs is a strong function of the channel length, drain voltage, and operating temperature. A new cross-over behavior of the worst-case gate voltage condition is reported at low temperatures. New understanding of the hot-carrier mechanisms at low temperatures is also discussed. Low temperature effects such as freeze-out are shown to have important contributions to the hot-carrier behavior at low temperatures. A trend is identified for the first time which suggests important consequences for the hot-carrier reliability of deep sub-micron channel length MOSFETs under normal operating temperatures.

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Section: Introductionmentioning

confidence: 99%

New understanding of LDD CMOS hot-carrier degradation and device lifetime at cryogenic temperatures

Wang-Ratkovic

Lacoe

MacWilliams

et al.

1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual

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“…The temperature reduction allows a substantial increase of the carrier mobility and saturation velo city, better turn-on capabilities, latch-up immunity, reduction in activated degradation processes, lower power consumption, decrease of leakage current, reduced thermal noise, increased thermal conductivity, etc [1][2][3][4][5][6][7][8][9][10][11][12]. Nevertheless, the low temperature operation leads to some problems and difficulties related to specific cryogenic conditions.…”

Section: Introductionmentioning

confidence: 99%

Device Physics and Electrical Performance of Bulk Silicon Mosfets

Ghibaudo¹

2001

Device and Circuit Cryogenic Operation for Low Temperature Electronics

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“…At low temperatures, majority carrier devices demonstrate reduced leakage current and reduced latch-up susceptibility. In addition, these devices show higher speed resulting from increased carrier mobility and saturation velocity [3][4][5]. An example is the power MOSFET that has lower conduction losses at low temperature due to the reduction in the drain-to-source resistance RDS(on) resulting from increased carrier mobility [4,6,7].…”

Section: Introductionmentioning

confidence: 99%