Collective Memory Transfers for Multi-Core Chips

Classifying memory access patterns is paramount to the selection of the right set of optimizations and determination of the parallelization strategy. Static analyses suffer from ambiguities present in source code, which modern compilation techniques, such as profile-guided optimization, alleviate by observing runtime behavior and feeding back into the compilation flow. This paper discusses a dynamic analysis technique for recognizing memory access patterns, with application to the stencils domain, and presents our design and C++ implementation using the memory-tracing tool Gleipnir. Finally, we evaluate and discuss the performance and matching capability of our classifiers in the context of the Polybench scientific benchmark suite, which includes both stencil and matrix computations.

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Collective Memory Transfers for Multi-Core Chips

Cited by 2 publications

References 61 publications

Exploiting DMA for Performance and Energy Optimized STREAM on a DSP

Exploiting DMA for Performance and Energy Optimized STREAM on a DSP

Trace-Driven Memory Access Pattern Recognition in Computational Kernels

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