Combined effect of single-electron charging and quantum confinement on field electron emission from heterostructured nanotips

Kleshch, Victor I.

doi:10.1109/ivnc52431.2021.9600729

Cited by 1 publication

(1 citation statement)

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“…In summary, the electrostatic energy oscillates when two parabolas meet at a degeneracy point, causing an extra electron to be removed. This process is concerned with the drain or source of electrons, as the charging level on the dot is affected by the source of electrons [23], [24]. The single electron box exhibits a step-like behavior in total charge, with each electron charging one at a time [25].…”

Section: Figure 1 Moore's Law Applied To Technology Trendmentioning

confidence: 99%

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Shruti Suman

2024

jes

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Gordon Moore's "Moore's Law" suggests chip functionality demand doubles every 1.5-2 years, with global semiconductor technology roadmap recommending sub-nanometer ranges for IC production in nano-electronics. The single electron transistor (SET) is a promising nano-scale device that can be co-integrated with CMOS technology to improve performance. The paper explores the tunnelling effect between nanoparticles in single electron transistors (SET), revealing coulomb blockade transactions and resistance increases with reduced bias. It focuses on single electron transistors and pre-terminal devices, discussing IV characteristics, coulomb diamond plots, and metallic quantum dots. This research also explores the hybrid SET-FET based model, focusing on developing a room temperature SET in CMOS comparable technology with a Field Effect Transistor (FET). Prediction models and exploratory studies guide the integration of SET-FET technology. SIMON is a comprehensive simulator designed for single-electron devices and circuits. The output current is not impacted by capacitances up to 1 pF, and FET size in the micron range are appropriate for SET signal amplification up to 4 µA. This research explores the modelling of SET-FET technology in highlighting its ability to mitigate drawbacks in low drive current when combined with a FET. It also explores device variability mitigation in nanoscale array configurations, finding that SET-FET significantly reduces variability in larger arrays, despite the impact of capacitance and resistance.

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Section: Figure 1 Moore's Law Applied To Technology Trendmentioning

confidence: 99%

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Shruti Suman

2024

jes

View full text Add to dashboard Cite

show abstract

Combined effect of single-electron charging and quantum confinement on field electron emission from heterostructured nanotips

Cited by 1 publication

References 13 publications

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

Analytical Modelling and Performance Characterization of Hybrid SET-MOS

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