2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) 2019
DOI: 10.1109/apccas47518.2019.8953133
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Combined MPSoC Task Mapping and Memory Optimization for Low-Power

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Cited by 3 publications
(1 citation statement)
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“…The future multi-processor system-on-chip (MPSoC) has hundreds or thousands of core resources, and the development trend of MPSoC will further develop towards the direction of heterogeneous multicore low power consumption and high performance. Especially the realization of efficient parallel computation on multi-core devices with limited or even no run-time environment has been subject to intensive research [1]. Solutions related to tool flow, parallelization language, software task mapping, and code generation for multiple targets are already commercially available [2].…”
Section: Introductionmentioning
confidence: 99%
“…The future multi-processor system-on-chip (MPSoC) has hundreds or thousands of core resources, and the development trend of MPSoC will further develop towards the direction of heterogeneous multicore low power consumption and high performance. Especially the realization of efficient parallel computation on multi-core devices with limited or even no run-time environment has been subject to intensive research [1]. Solutions related to tool flow, parallelization language, software task mapping, and code generation for multiple targets are already commercially available [2].…”
Section: Introductionmentioning
confidence: 99%