Combined Optimizer for Automatic Design of Machine Learning-Based Fault Classifier for Multilevel Inverters

Abstract

Fault detection and classification are fundamental requirements of multilevel inverters (MLIs) to ensure constant operation and improved reliability. Nowadays, the machine learning (ML) technique is utilized for fault diagnosis in MLIs due to its inherent features such as high accuracy, reduced computation time, and complexity. However, the rich availability of parts and classifiers in ML techniques demands a tedious investigation of every combination to design an optimal fault classifier. To overcome this problem, a combined optimiser is proposed to automate the ML-based classifier design, which involves selecting optimal features and classifier. Mean, total harmonic distortion, root mean square, and different harmonic orders (upto 12 th order) of the output voltage of MLI are considered as features and four different ML techniques like K-nearest neighborhood, decision tree, Naive Bayesian classifier, and support vector machines are considered. Ant Colony Optimization (ACO) is used to formulate a combinatorial optimization routine to maximize classification accuracy by optimal selection of features and classifier. The proposed technique is used to design a fault classifier for two different MLIs, such as Cascaded H-bridge MLI (CHBMLI) and Packed U cell inverter (PUC), during the fault conditions (open circuit and short circuit) to check the feasibility. Simulation results illustrate classification accuracy of 97.84% and 98.61% for CHBMLI and PUC, respectively. Experimental validation of the designed classifier on the inverter prototype is also carried out and illustrates 95.56% and 94.28% classification accuracy for CHBMLI and PUC, respectively.

Design and Experimental Verification of PUC Multilevel Inverter-Based PMSG Wind Energy Conversion System

“…In When the five-level CHB inverter and five-level PUC MLI are compared, the PUC5 MLI will have only a single DC source, whereas the CHB inverter topology needs two DC sources for proper switching. Another feature is that the CHB topology is more complex in terms of the control scheme of the power semiconductors [58][59][60]. Table 3 compares the circuit components utilized in the PUC topology and other MLI topologies.…”

Fault Diagnosis of Asymmetric Cascaded Multilevel Inverter using Ensemble Machine Learning

“…THD, RMS and mean voltage, and harmonics up-to 12 th order are considered as characteristic features. The classification accuracy achieved using CMLI is 95.56%, and that of Packed Ucell (PUC) inverters is 94.28% [20]. Affine-Invariant Riemannian Metric Autoencoder Random Forest (AIRMAR) is proposed to recognize OCF in MLI [21].…”