Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter

Abstract

Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.

Common-Mode Voltage Reduction Algorithm for Photovoltaic Grid-Connected Inverters with Virtual-Vector Model Predictive Control

“…In Table 2, the highest CMV is V dc /2 because SVPWM employs zero voltage vectors. In what follows, we introduce AZSPWM [2], NSPWM [14], and RSPWM [16]-these PWM techniques share the common feature of suppressing the CMV amplitude and toggling frequency. Figure 3 Under the sector , the action times of each vector can be calculated according to the volt-second principle, as in Equation ( 7) [35]:…”

“…Theoretically non-changing CMV [16] Low DC-bus utilization [16] This paper's contribution is as follows: (1) In the proposed improved commonmode reduction space vector pulse width modulation (CMRSVPWM) with 18 sub-sectors organizes the switching sequences in each sub-sector into resulting lower CMV amplitude and oscillation frequency; (2) MPC uses a large amount of virtual voltage vectors, such that all the 18 subsectors can be fully utilized. By combining the virtual vector MPC and CMRSVPWM, the CMV performance of the single-stage inverter can be improved.…”

“…However, the corresponding DC-bus utilization factor is very poor. In addition, non-zero voltage vector modulation approaches, such as active zero-state switch PWM [2], near-state PWM [14,15], and remote-state PWM [16] have been reported in the past. Moreover, [17,18] compare the performance indices of various modulation schemes, in terms of e.g., CMV amplitude, output THD.…”

Hybrid Multicarrier Random Space Vector PWM for the Mitigation of Acoustic Noise

“…In most of the practical real-time drive applications, the controller algorithm is coordinated with the inverter switching. Hence, the adjustable switching frequency disturbs the drive performance when it plays in the closed-loop systems [25,26]. In an electric drive system without exciting mechanical resonance, the fixed quasi-random carrier frequency PWM technique is proposed to abolish acoustical noise [12].…”

“…A random center distribution (RCD) problem is solved by the two-phase double zerovector random center distribution structure. The modulation index of RCD is high and not reduced properly [25][26][27]. A fixed and randomized PWM technique for the fully controlled converter reduces the harmonic intensity, contributing efficiency [28,29].…”