Communication network latency compensation in modular multilevel converters

Corrêa, Tomás P.; Bueno, Emilio; Rodríguez, Francisco

doi:10.1109/ecce.2017.8095766

Cited by 7 publications

(12 citation statements)

References 10 publications

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“…Often, applications have a payload proportional to the number of nodes (P = κ • P Bytes/node ) or such dependency is a good approximation. If we neglect the protocol overhead (in an efficient protocol it should represent a small fraction of the payload) then the critical forwarding delay (T critical fw ), defined as the forwarding delay that equals the frame delay, becomes proportional to the communication bandwidth and payload per node Equation (5). Note that the number of nodes in the network becomes irrelevant.…”

Section: Link Technologymentioning

confidence: 99%

“…Another contribution of this work is the use of hardware accelerators to eliminate the node delay dependency on the packet size, a point often overlooked. This reduction is relevant, because it decreases the end-to-end delay that affects the application control performance [5], which is the sum of cycle time plus the node internal delays in transferring data to and from the network. Those accelerators can be easily implemented in Field Programmable Gate Array (FPGA) or Application Specific Integrated Circuit (ASIC) technologies.…”

Section: Introductionmentioning

confidence: 99%

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Hardware Support to Minimize the End-to-End Delay in Ethernet-Based Ring Networks

Corrêa

Almeida

2019

Electronics

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Ethernet is a popular networking technology in factory automation and industrial embedded systems, frequently using a ring topology for improved fault-tolerance. As many applications demand ever shorter cycle times and a higher number of nodes, the popular ring endure to remain as a valid topology. In this work, we discuss the factors that determine the ring network delay and show how they affect the network cycle time. Since increasing the link capacity has limited reach, we explore a time-triggered protocol that brings the nodes forwarding delay near to the physical layer delay. Additionally, we propose hardware accelerators based on FPGA technology that minimise the packet reception delay from physical reception to delivery to an application handler, preserving Ethernet layers and being compatible with its standard. This paper explains the accelerators concept and implementation, presents measurements using standard Media Access Control implementations, and shows the solution effectiveness with experimental results. We achieved a delay, from physical reception to the triggering of a user-level handler, of 1.1 µs independent of the packet length.

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Section: Link Technologymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Hardware Support to Minimize the End-to-End Delay in Ethernet-Based Ring Networks

Corrêa

Almeida

2019

Electronics

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“…Smith proposed what today is known as the Smith predictor [19]. Recently, Cortes et al adopted a similar approach to compensate for the delay introduced by Model Predictive Control calculations [20,21]. The main contributions of this work are: adoption of a model-based predictor for compensating the additional latency introduced by the communication network; description of modulation and balancing schemes pertinent to network controlled MMCs and its relation to the proposed estimation algorithm; assessment of parameter variations in the control performance; and validation of the concept in an experimental set-up.…”

Section: Starmentioning

confidence: 99%

“…It is possible to verify the system stability, study mismatches between plant and model or the effect of the controller tunning by calculating the eigenvalues of (14) in [21]. To exemplify, we discretized the plant (3) using a Zero-Order Hold and considered the closed-loop system with a delay of two samples (Figure 7).…”

Section: Parameters' Sensitivitymentioning

confidence: 99%

“…To exemplify, we discretized the plant (3) using a Zero-Order Hold and considered the closed-loop system with a delay of two samples (Figure 7). The maximum absolute Eigenvalues of the matrix Σ (defined in [21]) for different plant/model inductance ratios ( L eq/L eq ) and controllers' gains, represented here as the settling time used in the controller design, are shown in Figure 10a. As expected, a faster controller is more sensitive to models' mismatch, but the closed-loop plant is stable with all three controllers as long as the plant to model inductance ratio is greater than 0.38.…”

Section: Parameters' Sensitivitymentioning

confidence: 99%

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Model-Based Latency Compensation for Network Controlled Modular Multilevel Converters

2018

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The use of an internal digital communication network enhances the scalability, implementation and maintenance of Modular Multilevel Converters (MMC). However, it also introduces delays that limit the sampling frequency and the controller dynamic performance. In this paper, we propose a model-based predictor to compensate for the loop delay and overcome these limitations. Two benefits of this approach are possible: either designers can increase the sampling rate and control performance or employ a slower communication protocol/technology. In this paper, we present the mathematical description of the model-based predictor, assess the parameter sensitivity, and show matching simulation and experimental results that validate it. As constraints introduced by the use of digital communications are overcome, the results achieved encourage engineers to adopt a network into the design of Modular Multilevel Converters.

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Modelling and stability assessment of the MMC‐HVDC energy interconnected system with the cyber delay of communication network

Cao

Dong

et al. 2021

IET Energy Syst Integration

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Modular multilevel converters (MMCs) are favoured in high voltage direct current (HVDC) systems because of huge energy transmission capacity and few harmonics. However, the complicated control and the intricate communication network introduce cyber delay that affects the system dynamics. The communication structure is discussed and delay components are studied. The authors derive the MMC-HVDC system model considering the cyber delay effect. Padé approximation is utilised to transform the transcendental characteristic equation of the delay model into an algebraic equation so that the dynamics can be observed through the eigenvalues. The comparison between the established model and the simulation in Simulink validates the proposed model's accuracy. The exact delay margin and the root cause of losing the stability are also discussed. The results show that the model is able to obtain the delay margin with a tiny error caused by the omitted high-order harmonics and the cyber delay destabilises the system by lowering the controller performances. | INTRODUCTION | Motivation and incitementModular multilevel converters (MMCs) are widely applied in medium or high-voltage industrial applications (HVDC) [1]. In the MMC-HVDC system, hundreds of sub-modules (SMs) are combined as a strong, flexible equivalent voltage source. The large transmission capacity of MMC-HVDC system enables the power grid to integrate other forms of energy more efficiently. In other words, the MMC-HVDC energy interconnected system is an important element of energy integration. However, it also brings a challenge for the design of control and communication [2,3] and induces serious delay issue, which jeopardises the whole system's dynamics and stability [4,5].Further, to ensure that the control system offers the appropriate control signals of the converters in time, the communication network is designed meticulously.Besides, an appropriate MMC-HVDC system model is required to analyse the system dynamics and stability under the control and cyber delay's effect. | Literature reviewBecause of the practicability and reliability, [6-10] utilised the ring topology in their communication networks. A lot of communication protocols like EtherCAT (Ethernet for Control Automation Technology) [6][7][8][9][10][11][12], CAN [13], PROFINET IRT [7] are applied, among which EtherCAT has the best performance [6,8] and is suitable for the ring topology. Distributed control [2,3,13] is a good idea to lighten the computation burden and reduce the information shared inside the system. In the distributed modulation situation, the controller is only in charge of calculating and outputting reference signals. The local control units (LCUs) of SMs thenThis is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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Communication network latency compensation in modular multilevel converters

Cited by 7 publications

References 10 publications

Hardware Support to Minimize the End-to-End Delay in Ethernet-Based Ring Networks

Hardware Support to Minimize the End-to-End Delay in Ethernet-Based Ring Networks

Model-Based Latency Compensation for Network Controlled Modular Multilevel Converters

Modelling and stability assessment of the MMC‐HVDC energy interconnected system with the cyber delay of communication network

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